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AS7341 数据表(PDF) 54 Page - ams AG |
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AS7341 数据表(HTML) 54 Page - ams AG |
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54 / 69 page ![]() Document Feedback AS7341 Register Description Datasheet • PUBLIC DS000504 • v3-00 • 2020-Jun-25 68 │ 53 Addr: 0xA9 CFG0 Bit Bit Name Default Access Bit Description 4 REG_BANK 0 RW Register Bank Access 0: Register access to register 0x80 and above 1: Register access to register 0x60 to 0x74 Note: Bit needs to be set to access registers 0x60 to 0x74. If registers 0x80 and above needs to be accessed bit needs to be set to “0”. 3 reserved 0 reserved 2 WLONG 0 RW Trigger Long. Increases the WTIME setting by a factor of 16. 1:0 reserved 0 reserved CFG3 Register (Address 0xAC) Figure 83: CFG 3 Register Addr: 0xAC CFG3 Bit Bit Name Default Access Bit Description 7:5 reserved 0 reserved 4 SAI 0 RW Sleep after interrupt. If set, the oscillator is turned off whenever an interrupt is active. SAI_ACTIVE is set in this event. To activate the oscillator again, clear all interrupts and clear the SAI_ACTIVE bit. 3:0 reserved 0xC reserved |
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