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ADV7390EBZ 数据表(PDF) 65 Page - Analog Devices |
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ADV7390EBZ 数据表(HTML) 65 Page - Analog Devices |
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65 / 96 page  ADV7390/ADV7391/ADV7392/ADV7393 Rev. 0 | Page 65 of 96 TYPICAL APPLICATION CIRCUIT P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 DGND PGND DGND PGND 0.1µF GND_IO 0.01µF GND_IO 33µF GND_IO 10µF GND_IO FERRITE BEAD VDD_IO VDD_IO POWER SUPPLY DECOUPLING 0.1µF PGND 0.01µF PGND 33µF PGND 10µF PGND FERRITE BEAD PVDD PVDD POWER SUPPLY DECOUPLING 0.1µF AGND 0.01µF AGND 33µF AGND 10µF AGND FERRITE BEAD VAA VAA POWER SUPPLY DECOUPLING 0.1µF DGND 0.01µF DGND 33µF 10µF DGND FERRITE BEAD VDD VDD POWER SUPPLY DECOUPLING FOR EACH POWER PIN ADV739x HSYNC VSYNC CLKIN AGND AGND DGND DGND GND_IO GND_IO RSET AGND 510Ω DAC 1 DAC 2 DAC 3 AGND 75Ω AGND 75Ω AGND 75Ω DAC 1 DAC 2 DAC 3 COMP VAA 2.2nF EXT_LF 12nF 150nF 170Ω PVDD SDA/SCLK SCL/MOSI SFL/MISO ALSB/SPI_SS RESET PIXEL PORT INPUTS CONTROL INPUTS/OUTPUTS CLOCK INPUT MPU PORT INPUTS/OUTPUTS DAC 1 DAC 1 DAC 3 DGND DACs 1 TO 3 LOW DRIVE OPTION RSET AGND 4.12kΩ EXTERNAL LOOP FILTER LOOP FILTER COMPONENTS SHOULD BE LOCATED CLOSE TO THE EXT_LF PIN AND ON THE SAME SIDE OF THE PCB AS THE ADV739x. NOTES 1. FOR OPTIMUM PERFORMANCE, EXTERNAL COMPONENTS CONNECTED TO THE COMP, RSET AND DAC OUTPUT PINS SHOULD BE LOCATED CLOSE TO, AND ON THE SAME SIDE OF THE PCB AS THE ADV739x. 2. WHEN OPERATING IN I2C MODE, THE I2C DEVICE ADDRESS IS CONFIGURABLE USING THE ALSB/SPI_SS PIN: ALSB/SPI_SS = 0, I2C DEVICE ADDRESS = 0xD4 OR 0x54 ALSB/SPI_SS = 1, I2C DEVICE ADDRESS = 0xD6 OR 0x56 3. THE RESISTOR CONNECTED TO THE RSET PIN SHOULD HAVE A 1% TOLERANCE. 4. THE RECOMMENDED MODE OF OPERATION FOR THE DACs IS FULL- DRIVE (RSET = 510Ω, RL = 37.5Ω). DACs 1 TO 3 FULL DRIVE OPTION (RECOMMENDED) 75Ω AGND 300Ω ADA4411-3 DAC 2 1µF AGND OPTIONAL LPF OPTIONAL LPF OPTIONAL LPF ADV7392/ ADV7393 ONLY LPF DAC 2 75Ω AGND 300Ω ADA4411-3 LPF DAC 3 75Ω AGND 300Ω ADA4411-3 LPF Figure 92. ADV739x Typical Application Circuit |
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