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Power Supplies

Layout Information

PowerPAD Package

Assembly Process

ADS5463

SLAS515 – NOVEMBER 2006

Application Information (continued)

The use of low-noise power supplies with adequate decoupling is recommended. Linear supplies are the

preferred choice versus switched ones, which tend to generate more noise components that can be coupled to

the ADS5463. The ADS5463 uses three power supplies. For the analog portion of the design, a 5-V and 3.3-V

AVDD is used, while the digital portion uses a 3.3-V supply (DVDD). All the ground pins are marked as GND,

although analog and digital grounds are not tied together inside the package. The PSRR value and plot given

were obtained by calibrating out the effect of the supply decoupling capacitors. With the decoupling capacitors in

place, the board-level PSRR is actually much higher than the stated value for the ADC.

The evaluation board represents a good guideline of how to lay out the board to obtain the maximum

performance from the ADS5463. General design rules, such as the use of multilayer boards, single ground plane

for ADC ground connections, and local decoupling ceramic chip capacitors, should be applied. The input traces

should be isolated from any external source of interference or noise, including the digital outputs as well as the

clock traces. The clock signal traces should also be isolated from other signals, especially in applications where

low jitter is required like high IF sampling. Besides performance-oriented rules, care must be taken when

considering the heat dissipation of the device. The thermal heat sink should be soldered to the board as

described in the PowerPad Package section. See ADS5463 EVM User Guide (SLAU194) on the TI Web site for

the evaluation board schematic.

The PowerPAD package is a thermally enhanced standard-size IC package designed to eliminate the use of

bulky heatsinks and slugs traditionally used in thermal packages. This package can be easily mounted using

standard printed circuit board (PCB) assembly techniques, and can be removed and replaced using standard

repair procedures.

The PowerPAD package is designed so that the leadframe die pad (or thermal pad) is exposed on the bottom of

the IC. This provides an extremely low thermal resistance path between the die and the exterior of the package.

The thermal pad on the bottom of the IC can then be soldered directly to the printed circuit board (PCB), using

the PCB as a heatsink.

1. Prepare the PCB top-side etch pattern including etch for the leads as well as the thermal pad as illustrated in

the Mechanical Data section.

2. Place a 6-by-6 array of thermal vias in the thermal pad area. These holes should be 13 mils in diameter. The

small size prevents wicking of the solder through the holes.

3. It is recommended to place a small number of 25-mil-diameter holes under the package, but outside the

thermal pad area, to provide an additional heat path.

4. Connect all holes (both those inside and outside the thermal pad area) to an internal copper plane (such as a

ground plane).

5. Do not use the typical web or spoke via-connection pattern when connecting the thermal vias to the ground

plane. The spoke pattern increases the thermal resistance to the ground plane.

6. The top-side solder mask should leave exposed the terminals of the package and the thermal pad area.

7. Cover the entire bottom side of the PowerPAD vias to prevent solder wicking.

8. Apply solder paste to the exposed thermal pad area and all of the package terminals.

For more detailed information regarding the PowerPAD package and its thermal properties, see either the

PowerPAD Made Easy application brief (SLMA004) or the PowerPAD Thermally Enhanced Package application

report (SLMA002).

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