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AM26LS31CD 数据表(PDF) 9 Page - Texas Instruments

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部件名 AM26LS31CD
功能描述  AM26LS31x Quadruple Differential Line Driver
PDF  34 Pages
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制造商  TI [Texas Instruments]
网页  http://www.ti.com
标志 TI - Texas Instruments

AM26LS31CD 数据表(HTML) 9 Page - Texas Instruments

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1Z
1Y
G
G
1A
4
12
1
2
3
2Z
2Y
2A
7
6
5
3Z
3Y
3A
9
10
11
4Z
4Y
4A
15
14
13
Copyright © 2016, Texas Instruments Incorporated
9
AM26LS31, AM26LS31C, AM26LS31I, AM26LS31M
www.ti.com
SLLS114L – JANUARY 1979 – REVISED OCTOBER 2018
Product Folder Links: AM26LS31 AM26LS31M
Submit Documentation Feedback
Copyright © 1979–2018, Texas Instruments Incorporated
8 Detailed Description
8.1 Overview
The AM26LS31x differential bus transmitter is a monolithic integrated circuit designed for unidirectional data
communication on transmission lines. It is designed for balanced transmission lines and meets ANSI Standard
EIA/TIA-422-B and ITU Recommendation V.11.
The AM26LS31x has a four 3-state differential line drivers that operate from a single 5-V power supply. The
driver also integrates active-high and active-low enables for precise device control.
The driver is designed to handle loads of a minimum of ±30 mA of sink or source current. The driver features
positive- and negative-current limiting for protection from line fault conditions.
8.2 Functional Block Diagram
8.3 Feature Description
8.3.1 Complementary Output-Enable Inputs
The AM26LS31x can be configured using the G and G logic inputs to control transmitter outputs. Setting either G
to a logic HIGH or G to an logic LOW enables the transmitter outputs. If G is set to logic LOW and G is set to
logic HIGH, the transmitter outputs are disabled. See Table 1 for a complete truth table.
8.3.2 High Output Impedance in Power-Off Conditions
When the AM26LS31x transmitter outputs are disabled using G and G, the outputs are set to a high impedance
state.
8.3.3 Complementary Outputs
The AM26LS31x is the driver half of a pair of devices, with the AM26LS32 being the complementary receiver. TI
recommends using these devices together for optimal performance, but any RS-422 compliant receive must
ensure proper RS-422 communication and logic level translation.



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