CDP1802AC/3

FN1441 Rev 3.00

Page 13 of 27

October 17, 2008

FIGURE 12. INTERRUPT CYCLE TIMING WAVEFORMS

Performance Curves

FIGURE 13. TYPICAL MAXIMUM CLOCK FREQUENCY AS A

FUNCTION OF TEMPERATURE

FIGURE 14. TYPICAL MAXIMUM CLOCK FREQUENCY AS A

FUNCTION OF SUPPLY VOLTAGE

Machine Cycle Timing Waveforms (Propagation Delays Not Shown) (Continued)

01

23

45

67

01

23

45

670

12

34

56

CLOCK

TPA

TPB

MACHINE

CYCLE

INSTRUCTION

CYCLE n

CYCLE (n + 1)

CYCLE (n + 2)

INTERRUPT (S3)

EXECUTE (S1)

FETCH (S0)

MRD

MWR

INTERRUPT

MEMORY

OUTPUT

VALID OUTPUT

NOTE: USER GENERATED SIGNAL

MEMORY READ CYCLE

MEMORY READ, WRITE

NON-MEMORY CYCLE

OR NON-MEMORY CYCLE

“DON’T CARE” OR INTERNAL DELAYS

HIGH IMPEDANCE STATE

(NOTE)

(INTERNAL) IE

5

4

3

2

1

0

6

7

8

35

45

55

65

75

85

95

105

115

25

125

VDD = 5V

LOAD CAPACITANCE (CL) = 50pF

AMBIENT TEMPERATURE (TA) (°C)

34567

89

10

12

2

SUPPLY VOLTAGE (VDD) (V)

11

5

4

3

2

1

0

6

7

8

LOAD CAPACITANCE (CL) = 50pF

TA = +25°C

TA = +125°C