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FXPS7115D4 数据表(PDF) 13 Page - NXP Semiconductors

部件名 FXPS7115D4
功能描述  Digital absolute pressure sensor, 40 kPa to 115 kPa
PDF  72 Pages
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制造商  NXP [NXP Semiconductors]
网页  http://www.nxp.com
标志 NXP - NXP Semiconductors

FXPS7115D4 数据表(HTML) 13 Page - NXP Semiconductors

Back Button FXPS7115D4 Datasheet HTML 9Page - NXP Semiconductors FXPS7115D4 Datasheet HTML 10Page - NXP Semiconductors FXPS7115D4 Datasheet HTML 11Page - NXP Semiconductors FXPS7115D4 Datasheet HTML 12Page - NXP Semiconductors FXPS7115D4 Datasheet HTML 13Page - NXP Semiconductors FXPS7115D4 Datasheet HTML 14Page - NXP Semiconductors FXPS7115D4 Datasheet HTML 15Page - NXP Semiconductors FXPS7115D4 Datasheet HTML 16Page - NXP Semiconductors FXPS7115D4 Datasheet HTML 17Page - NXP Semiconductors Next Button
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NXP Semiconductors
FXPS7115D4
Digital absolute pressure sensor, 40 kPa to 115 kPa
aaa-029746
SDA
SDA stable
SDA = `1'
SDA stable
SDA = `0'
SDA
changes
SCL
Figure 14. I2C bit transmissions
7.4.2 I2C start condition
A bus operation is always started with a start condition (START) from the host. A START is defined as a high to
low transition on SDA while SCL is high as shown in Figure 15. After the START signal has been transmitted by
the host, the bus is considered busy. Timing for the start condition is specified in Table 105.
A start condition (START) and a repeat START condition (rSTART) are identical.
aaa-029747
SDA
SCL
START
Figure 15. I2C start condition
7.4.3 I2C byte transmission
Data transfers are completed in byte increments. The number of bytes that can be transmitted per transfer
is unrestricted. Each byte must be followed by an acknowledge bit (Section 7.4.4 "I2C acknowledge and not
acknowledge transmissions") from the receiver. Data is transferred with the most significant bit (MSB) first (see
Figure 16). The host generates all clock pulses, including the ninth clock for the acknowledge bit. Timing for
the byte transmissions is specified in Section 7.4.4 "I2C acknowledge and not acknowledge transmissions". All
functions for this device are completed within the acknowledge clock pulse. Clock stretching is not used.
aaa-029748
SDA
SCL
ACK
ACK
from client
from receiver
STOP
START
Figure 16. I2C byte transmissions
FXPS7115D4
All information provided in this document is subject to legal disclaimers.
© 2023 NXP B.V. All rights reserved.
Product data sheet
Rev. 6.2 — 28 June 2023
13 / 72



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