AD8352

Rev. 0 | Page 15 of 20

0

–150

0

52.50

FREQUENCY (MHz)

–10

–20

–30

–40

–50

–60

–70

–80

–90

–100

–110

–120

–130

–140

5.25 10.50 15.75 21.00 26.25 31.50 36.75 42.00 47.25

SNR = 67.26dBc

SFDR = 83.18dBc

NOISE FLOOR = –110.5dB

FUND = –1.074dBFS

SECOND = –83.14dBc

THIRD = –85.39dBc

LAYOUT AND TRANSMISSION LINE EFFECTS

High Q inductive drives and loads, as well as stray transmission

line capacitance in combination with package parasitics, can

potentially form a resonant circuit at high frequencies resulting

in excessive gain peaking or possible oscillation. If RF transmis-

sion lines connecting the input or output are used, they should

be designed such that stray capacitance at the I/O pins is

minimized. In many board designs, the signal trace widths

should be minimal where the driver/receiver is less than one-

eighth of the wavelength from the AD8352. This non-transmission

line configuration requires that underlying and adjacent ground

and low impedance planes be far removed from the signal lines.

In a similar fashion, stray capacitance should be minimized

also requires not placing low impedance planes near these

components. Refer to the evaluation board layout (

Figure 34. Single Tone Distortion AD8352 Driving AD9445, Encode Clock @

Figure 37

and

FREQUENCY (MHz)

0

–150

0

52.50

–10

–20

–30

–40

–50

–60

–70

–80

–90

–100

–110

–120

–130

–140

5.25 10.50 15.75 21.00 26.25 31.50 36.75 42.00 47.25

SNR = 61.98dBc

NOISE FLOOR = –111.2dB

FUND1 = –7.072

FUND2 = –7.043

IMD (2F2-F1) = –89dBc

IMD (2F1-F2) = –88dBc

Figure 38) for more information. Excessive stray capacitance

at these nodes results in unwanted high frequency distortion.

The 0.1 μF supply decoupling capacitors need to be close to the

amplifier. This includes Signal Capacitor C2 through Signal

Capacitor C5.

Parasitic suppressing resistors (R5, R6, R7, and R11) can be

used at the device I/O pins. Use 25 Ω series resistors (Size 0402)

to adequately de-Q the input and output system from most

parasitics without a significant decrease in gain. In general,

if proper board layout techniques are used, the suppression

resistors may not be required. Output Parasitic Suppression

Resistor R7 and Output Parasitic Suppression Resistor R11 may

be required for driving some switch cap ADCs. These

suppressors, with Input C of the converter (and possibly added

External Shunt C), help provide charge kickback isolation and

improve overall distortion at high encode rates.

Figure 35. Two Tone Distortion AD8352 Driving AD9445,

Analog In = 98 MHz and 101 MHz, See Figure 32