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ADCMP601 数据表(PDF) 7 Page - Analog Devices

部件名 ADCMP601
功能描述  Rail-to-Rail, Very Fast, 2.5 V to 5.5 V, Single-Supply TTL/CMOS Comparators
PDF  16 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADCMP601 数据表(HTML) 7 Page - Analog Devices

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ADCMP600/ADCMP601/ADCMP602
Rev. 0 | Page 7 of 16
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Q 1
VP 3
VEE 2
VCCI/VCCO
5
VN
4
ADCMP600
TOP VIEW
(Not to Scale)
Q 1
VEE 2
VP 3
VCCI/VCCO
6
LE/HYS
5
VN
4
ADCMP601
TOP VIEW
(Not to Scale)
VCCI 1
VP 2
VN 3
SDN 4
VCCO
8
Q
7
VEE
6
LE/HYS
5
ADCMP602
TOP VIEW
(Not to Scale)
Figure 3. ADCMP600 Pin Configuration
Figure 4. ADCMP601 Pin Configuration
Figure 5. ADCMP602 Pin Configuration
Table 5. ADCMP600 (SOT-23-5 and SC70-5) Pin Function Descriptions
Pin No.
Mnemonic
Description
1
Q
Noninverting Output. Q is at logic high if the analog voltage at the noninverting input, VP, is greater
than the analog voltage at the inverting input, VN.
2
VEE
Negative Supply Voltage.
3
VP
Noninverting Analog Input.
4
VN
Inverting Analog Input.
5
VCCI/VCCO
Input Section Supply/Output Section Supply. Shared pin.
Table 6. ADCMP601 (SC70-6) Pin Function Descriptions
Pin No.
Mnemonic
Description
1
Q
Noninverting Output. Q is at logic high if the analog voltage at the noninverting input, VP, is greater
than the analog voltage at the inverting input, VN, if the comparator is in compare mode.
2
VEE
Negative Supply Voltage.
3
VP
Noninverting Analog Input.
4
VN
Inverting Analog Input.
5
LE/HYS
Latch/Hysteresis Control. Bias with resistor or current for hysteresis adjustment; drive low to latch.
6
VCCI/VCCO
Input Section Supply/Output Section Supply. Shared pin.
Table 7. ADCMP602 (MSOP-8) Pin Function Descriptions
Pin No.
Mnemonic
Description
1
VCCI
Input Section Supply.
2
VP
Noninverting Analog Input.
3
VN
Inverting Analog Input.
4
SDN
Shutdown. Drive this pin low to shut down the device.
5
LE/HYS
Latch/Hysteresis Control. Bias with resistor or current for hysteresis adjustment; drive low to latch.
6
VEE
Negative Supply Voltage.
7
Q
Noninverting Output. Q is at logic high if the analog voltage at the noninverting input, VP, is greater
than the analog voltage at the inverting input, VN, if the comparator is in compare mode.
8
VCCO
Output Section Supply.



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