ADG799A datasheet(3/24 Pages) AD

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ADG799A/ADG799G

Rev. 0 | Page 3 of 24

SPECIFICATIONS

VDD = 5 V ± 10%, GND = 0 V, TA = −40°C to +85°C, unless otherwise noted.

Table 1.

Parameter

Conditions

Min

Typ1

Max

Unit

ANALOG SWITCH

Analog Signal Range2

VS = VDD, RL = 1 MΩ

VS =VDD, RL = 75 Ω

3.3

On Resistance, RON

VD = 0 V, IDS = −10 mA, see Figure 22

2.6

VD = 0 V to 1 V, IDS = −10 mA, see Figure 22

5.5

On Resistance Matching Between Channels, ∆RON

VD = 0 V, IDS = −10 mA

0.15

1.85

VD = 1 V, IDS = −10 mA

1.85

On Resistance Flatness, RFLAT(ON)

VD = 0 V to 1 V, IDS = −10 mA

0.3

0.55

LEAKAGE CURRENTS

Source Off Leakage (IS(OFF))

VD = 4 V/1 V, VS = 1 V/4 V, see Figure 23

±0.25

Drain Off Leakage (ID(OFF))

VD = 4 V/1 V, VS = 1 V/4 V, see Figure 23

±0.25

Channel On Leakage (ID(ON), IS(ON))

VD = VS = 4 V/1 V, see Figure 24

±0.25

DYNAMIC CHARACTERISTICS3

tON, tENABLE

CL = 35 pF, RL = 50 Ω, VS = 2 V, see Figure 28

184

240

tOFF, tDISABLE

CL = 35 pF, RL = 50 Ω, VS = 2 V, see Figure 28

180

235

Break-Before-Make Time Delay, tD

CL = 35 pF, RL = 50 Ω, VS1 = VS2 = 2 V,

see Figure 29

I2C to GPO Propagation Delay, tH, tL (ADG799G only)

130

Off Isolation

f = 10 MHz, RL = 50 Ω, see Figure 26

−60

Channel-to-Channel Crosstalk

f = 10 MHz, RL = 50 Ω, see Figure 27

Same Crosspoint Switch

−50

Different Crosspoint Switch

−80

−3 dB Bandwidth

RL = 50 Ω, see Figure 15

230

MHz

THD + N

RL = 100 Ω

0.14

Charge Injection

CL = 1 nF, VS = 0 V, see Figure 30

CS(OFF)

CD(OFF)

CD(ON), CS(ON)

Power Supply Rejection Ratio, PSRR

f = 20 kHz

Differential Gain Error

CCIR330 test signal

0.56

Differential Phase Error

CCIR330 test signal

0.79

Degrees

LOGIC INPUTS3

A0, A1, A2 Pins

Input High Voltage, VINH

2.0

Input Low Voltage, VINL

0.8

Input Current, IINL or IINH

VIN = 0 V to VDD

0.005

±1

μA

Input Capacitance, CIN

SCL, SDA Pins

Input High Voltage, VINH

0.7 × VDD

VDD + 0.3

Input Low Voltage, VINL

−0.3

+0.3 × VDD

Input Leakage Current, IIN

VIN = 0 V to VDD

+0.005

±1

μA

Input Hysteresis

0.05 × VDD

Input Capacitance, CIN

LOGIC OUTPUTS

SDA Pin3

Output Low Voltage, VOL

ISINK = 3 mA

0.4

ISINK = 6 mA

0.6

Floating State Leakage Current

±1

μA

Floating State Output Capacitance

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