TPS73233DBVT datasheet(11/23 Pages) TI

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APPLICATION INFORMATION

INPUT AND OUTPUT CAPACITOR

TPS732xx

GND

OUT

Optional input capacitor.

May improve source

impedance, noise, or PSRR.

Optional output capacitor.

May improve load transient,

noise, or PSRR.

Optional bypass

capacitor to reduce

output noise.

OUTPUT NOISE

+ 32mVRMS

) R2)

+ 32mVRMS

OUT

REF

(1)

TPS732xx

GND

OUT

OUT =

× 1.204

1 + R2)

Optional input capacitor.

May improve source

impedance, noise, or PSRR.

Optional output capacitor.

May improve load transient,

noise, or PSRR.

Optional capacitor

reduces output noise

and improves

transient response.

N(mVRMS)

+ 27

mVRMS

OUT(V)

(2)

TPS732xx

SBVS037I – AUGUST 2003 – REVISED MAY 2006

in addition to the internal 8k

Ω resistor, presents the

The TPS732xx belongs to a family of new generation

same impedance to the error amp as the 27k

Ω

LDO regulators that use an NMOS pass transistor to

bandgap reference output. This impedance helps

achieve

ultra-low-dropout

performance,

reverse

compensate

for

leakages

into

the

error

amp

current blockage, and freedom from output capacitor

terminals.

constraints. These features, combined with low noise

and an enable input, make the TPS732xx ideal for

portable applications. This regulator family offers a

REQUIREMENTS

wide selection of fixed output voltage versions and

an adjustable output version. All versions have

Although an input capacitor is not required for

thermal

and

over-current

protection,

including

stability, it is good analog design practice to connect

foldback current limit.

a 0.1µF to 1µF low ESR capacitor across the input

supply near the regulator. This counteracts reactive

Figure 31 shows the basic circuit connections for the

input sources and improves transient response,

fixed

voltage

models.

Figure

gives

the

noise rejection, and ripple rejection. A higher-value

connections

for

the

adjustable

output

version

capacitor may be necessary if large, fast rise-time

(TPS73201).

load transients are anticipated or the device is

located several inches from the power source.

The TPS732xx does not require an output capacitor

for stability and has maximum phase margin with no

capacitor. It is designed to be stable for all available

types and values of capacitors. In applications where

VIN - VOUT < 0.5V and multiple low ESR capacitors

are in parallel, ringing may occur when the product of

COUT and total ESR drops below 50nΩF. Total ESR

includes all parasitic resistances, including capacitor

ESR and board, socket, and solder joint resistance.

In most applications, the sum of capacitor ESR and

trace resistance will meet this requirement.

Figure 31. Typical Application Circuit for

Fixed-Voltage Versions

A precision band-gap reference is used to generate

the internal reference voltage, VREF. This reference is

the dominant noise source within the TPS732xx and

it generates approximately 32µVRMS (10Hz to

100kHz) at the reference output (NR). The regulator

control loop gains up the reference noise with the

same gain as the reference voltage, so that the noise

voltage of the regulator is approximately given by:

Since the value of VREF is 1.2V, this relationship

reduces to:

Figure 32. Typical Application Circuit for

Adjustable-Voltage Versions

for the case of no CNR.

R1 and R2 can be calculated for any output voltage

An internal 27k

Ω resistor in series with the noise

using the formula shown in Figure 32. Sample

reduction pin (NR) forms a low-pass filter for the

resistor values for common output voltages are

voltage reference when an external noise reduction

shown in Figure 2.

capacitor, CNR, is connected from NR to ground. For

CNR = 10nF, the total noise in the 10Hz to 100kHz

For best accuracy, make the parallel combination of

bandwidth is reduced by a factor of ~3.2, giving the

R1 and R2 approximately euqal to 19kΩ. This 19kΩ,

approximate relationship:

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