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ADM3488ARZ 数据表(PDF) 6 Page - Analog Devices

部件名 ADM3488ARZ
功能描述  3.3 V Slew Rate Limited, Half- and Full-Duplex, RS-485/RS-422 Transceivers
PDF  20 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADM3488ARZ 数据表(HTML) 6 Page - Analog Devices

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ADM3483/ADM3485/ADM3488/ADM3490/ADM3491
Rev. B | Page 6 of 20
TIMING SPECIFICATIONS—ADM3483/ADM3485/ADM3488/ADM3490/ADM3491
VCC = 3.3 V, TA = 25°C, unless otherwise noted.
Table 5.
Parameter
Min
Typ
Max
Unit
Test Conditions/Comments
RECEIVER
Time to Shutdown (tSHDN)
ADM3483/ADM3485/ADM34911
80
190
300
ns
Propagation Delay, Low-to-High Level (tRPLH)
ADM3485/ADM3490/ADM3491
25
65
90
ns
VID = 0 V to 3.0 V, CL = 15 pF (see Figure 14 and Figure 20)
ADM3483/ADM3488
25
75
120
ns
Propagation Delay, High-to-Low Level (tRPHL)
ADM3485/ADM3490/ADM3491
25
65
90
ns
VID = 0 V to 3.0 V, CL = 15 pF (see Figure 14 and Figure 20)
ADM3483/ADM3488
25
75
120
ns
|tPLH – tPHL| Propagation Delay Skew (tRPDS)
ADM3485/ADM3490/ADM3491
10
ns
VID = 0 V to 3.0 V, CL = 15 pF (see Figure 14 and Figure 20)
ADM3483/ADM3488
20
ns
RECEIVER OUTPUT ENABLE/DISABLE TIMES
(ADM3483/ADM3485/ADM3491 ONLY)
Output Enable Time to Low Level (tPRZL)
25
50
ns
CL = 15 pF (see Figure 15 and Figure 21)
Output Enable Time to High Level (tPRZH)
25
50
ns
CL = 15 pF (see Figure 15 and Figure 21)
Output Disable Time from High Level (tPRHZ)
25
45
ns
CL = 15 pF (see Figure 15 and Figure 21)
Output Disable Time from Low Level (tPRLZ)
25
45
ns
CL = 15 pF (see Figure 15 and Figure 21)
Output Enable Time from Shutdown to
Low Level (tPRSL)
720
1400
ns
CL = 15 pF (see Figure 15 and Figure 21)
Output Enable Time from Shutdown to
High Level (tPRSH)
720
1400
ns
CL = 15 pF (see Figure 15 and Figure 21)
1 The transceivers are put into shutdown by bringing the RE high and DE low. If the inputs are in this state for less than 80 ns, the parts are guaranteed not to enter
shutdown. If the parts are in this state for 300 ns or more, the parts are guaranteed to enter shutdown.



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