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74LVC273 数据表(PDF) 2 Page - Nexperia B.V. All rights reserved |
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74LVC273 数据表(HTML) 2 Page - Nexperia B.V. All rights reserved |
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2 / 14 page ![]() Nexperia 74LVC273 Octal D-type flip-flop with reset; positive-edge trigger 4. Functional diagram mna763 D0 D1 D2 D3 D4 D5 D6 D7 MR CP Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 11 1 19 16 15 12 9 6 5 2 18 17 14 13 8 7 4 3 Fig. 1. Logic symbol mna764 19 16 15 12 9 6 5 11 C1 1 R 1D 2 18 17 14 13 8 7 4 3 D7 D0 D1 D2 D3 D4 D5 D6 Q7 Q6 Q5 Q4 Q3 Q2 Q0 Q1 CP MR Fig. 2. IEC logic symbol 5. Pinning information 5.1. Pinning 74LVC273 MR VCC Q0 Q7 D0 D7 D1 D6 Q1 Q6 Q2 Q5 D2 D5 D3 D4 Q3 Q4 GND CP 001aad093 1 2 3 4 5 6 7 8 9 10 12 11 14 13 16 15 18 17 20 19 Fig. 3. Pin configuration for SOT163-1 (SO20) and SOT360-1 (TSSOP20) 001aad094 74LVC273 Transparent top view Q4 D3 Q3 D4 D2 D5 Q2 Q5 Q1 Q6 GND(1) D1 D6 D0 D7 Q0 Q7 9 12 8 13 7 14 6 15 5 16 4 17 3 18 2 19 terminal 1 index area (1) This is not a ground pin. There is no electrical or mechanical requirement to solder the pad. In case soldered, the solder land should remain floating or connected to GND. Fig. 4. Pin configuration for SOT764-1 (DHVQFN20) 74LVC273 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2021. All rights reserved Product data sheet Rev. 8 — 31 August 2021 2 / 14 |
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