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74LVC374A 数据表(PDF) 7 Page - Nexperia B.V. All rights reserved

部件名 74LVC374A
功能描述  Octal D-type flip-flop; 5 V tolerant inputs/outputs; positive-edge trigger; 3-state
PDF  15 Pages
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制造商  NEXPERIA [Nexperia B.V. All rights reserved]
网页  https://www.nexperia.com/
标志 NEXPERIA - Nexperia B.V. All rights reserved

74LVC374A 数据表(HTML) 7 Page - Nexperia B.V. All rights reserved

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Nexperia
74LVC374A
Octal D-type flip-flop; 5 V tolerant inputs/outputs; positive-edge trigger; 3-state
-40 °C to +85 °C
-40 °C to +125 °C
Symbol Parameter
Conditions
Min
Typ[1] Max
Min
Max
Unit
Dn to CP; see Fig. 9
VCC = 1.65 V to 1.95 V
3.0
-
-
3.0
-
ns
VCC = 2.3 V to 2.7 V
2.0
-
-
2.0
-
ns
VCC = 2.7 V
1.5
-
-
1.5
-
ns
th
hold time
VCC = 3.0 V to 3.6 V
1.5
0.6
-
1.5
-
ns
see Fig. 7
VCC = 1.65 V to 1.95 V
100
-
-
64
-
MHz
VCC = 2.3 V to 2.7 V
125
-
-
100
-
MHz
VCC = 2.7 V
150
-
-
120
-
MHz
fmax
maximum
frequency
VCC = 3.0 V to 3.6 V
150
-
-
120
-
MHz
tsk(o)
output skew
time
VCC = 3.0 V to 3.6 V
[3]
-
-
1.0
-
1.5
ns
per flip-flop; VI = GND to VCC
[4]
VCC = 1.65 V to 1.95 V
-
11.6
-
-
-
pF
VCC = 2.3 V to 2.7 V
-
13.6
-
-
-
pF
CPD
power
dissipation
capacitance
VCC = 3.0 V to 3.6 V
-
15.4
-
-
-
pF
[1] Typical values are measured at Tamb = 25 °C and VCC = 1.2 V, 1.8 V, 2.5 V, 2.7 V and 3.3 V respectively.
[2] tpd is the same as tPLH and tPHL.
ten is the same as tPZL and tPZH.
tdis is the same as tPLZ and tPHZ.
[3] Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.
[4] CPD is used to determine the dynamic power dissipation (PD in μW).
PD = CPD x VCC 2 x fi x N + Σ(CL x VCC 2 x fo) where:
fi = input frequency in MHz; fo = output frequency in MHz
CL = output load capacitance in pF
VCC = supply voltage in Volt
N = number of inputs switching
Σ(CL x VCC 2 x fo) = sum of the outputs
10.1. Waveforms and test circuit
mna894
CP input
Qn output
tPHL
tPLH
tW
1/fmax
VM
VOH
VI
GND
VOL
VM
Measurement points are given in Table 8.
VOL and VOH are typical output voltage levels that occur with the output load.
Fig. 7. Clock (CP) to output (Qn) propagation delays, the clock pulse width, output transition times, and the
maximum frequency
74LVC374A
All information provided in this document is subject to legal disclaimers.
© Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 5 — 27 August 2021
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