Nexperia

74LVC4245A

Octal dual supply translating transceiver; 3-state

5. Pinning information

5.1. Pinning

74LVC4245A

VCC(A)

VCC(B)

DIR

VCC(B)

A0

OE

A1

B0

A2

B1

A3

B2

A4

B3

A5

B4

A6

B5

A7

B6

GND

B7

GND

GND

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1

2

3

4

5

6

7

8

9

10

11

12

14

13

16

15

18

17

20

19

22

21

24

23

Fig. 3. Pin configuration SOT137-1 (SO24) and

SOT355-1 (TSSOP24)

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74LVC4245A

Transparent top view

B7

A7

GND

B6

GND(1)

A6

B5

A5

B4

A4

B3

A3

B2

A2

B1

A1

B0

A0

OE

DIR

VCC(B)

11

14

10

15

9

16

8

17

7

18

6

19

5

20

4

21

3

22

2

23

terminal 1

index area

(1) This is not a ground pin. There is no electrical or

mechanical requirement to solder the pad. In case

soldered, the solder land should remain floating or

connected to GND.

Fig. 4. Pin configuration SOT815-1 (DHVQFN24)

5.2. Pin description

Table 2. Pin description

Symbol

Pin

Description

VCC(A)

1

supply voltage (5 V bus)

VCC(B)

23, 24

supply voltage (3 V bus)

GND

11, 12, 13

ground (0 V)

DIR

2

direction control

A0, A1, A2, A3, A4, A5, A6, A7

3, 4, 5, 6, 7, 8, 9, 10

data input or output

B0, B1, B2, B3, B4, B5, B6, B7

21, 20, 19, 18, 17, 16, 15, 14

data input or output

OE

22

output enable input (active LOW)

6. Functional description

Table 3. Functional table

H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state.

Input

Input/output

OE

DIR

An

Bn

L

L

A = B

input

L

H

input

B = A

H

X

Z

Z

74LVC4245A

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© Nexperia B.V. 2021. All rights reserved

Product data sheet

Rev. 13 — 27 August 2021

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