Nexperia

74LVC541A

Octal buffer/line driver with 5 V tolerant inputs/outputs; 3-state

4. Functional diagram

mna898

9

11

12

13

14

15

16

2

3

4

5

6

7

8

18

17

19

1

&

EN

Fig. 1. IEC logic symbol

2

3

4

5

6

7

8

9

18

17

16

15

14

13

12

11

1

19

A0

A1

A2

A3

A4

A5

A6

A7

Y0

Y1

Y2

Y3

Y4

Y5

Y6

Y7

OE1

OE2

mna900

Fig. 2. Functional diagram

5. Pinning information

5.1. Pinning

74LVC541A

OE1

VCC

A0

OE2

A1

Y0

A2

Y1

A3

Y2

A4

Y3

A5

Y4

A6

Y5

A7

Y6

GND

Y7

001aad115

1

2

3

4

5

6

7

8

9

10

12

11

14

13

16

15

18

17

20

19

Fig. 3. Pin configuration for SOT163-1 (SO20) and

SOT360-1 (TSSOP20)

001aad116

74LVC541A

Transparent top view

GND(1)

9

12

8

13

7

14

6

15

5

16

4

17

3

18

2

19

terminal 1

index area

A0

A1

A2

A3

A4

A5

A6

A7

OE2

Y0

Y1

Y2

Y3

Y4

Y5

Y6

(1) This is not a ground pin. There is no electrical or

mechanical requirement to solder the pad. In case

soldered, the solder land should remain floating or

connected to GND.

Fig. 4. Pin configuration for SOT764-1 (DHVQFN20)

74LVC541A

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© Nexperia B.V. 2021. All rights reserved

Product data sheet

Rev. 6 — 27 August 2021

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