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ADP1621 数据表(PDF) 3 Page - Analog Devices |
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ADP1621 数据表(HTML) 3 Page - Analog Devices |
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3 / 32 page  ADP1621 Rev. A | Page 3 of 32 SPECIFICATIONS VIN = 5 V, RFREQ = 100 kΩ, fOSC = 200 kHz, TJ = −40°C to 125°C, unless otherwise noted. Table 1. Parameter Symbol Conditions Min Typ Max Unit MAIN CONTROL LOOP Internal Soft Start Time tSS 2048 Cycles PIN Supply Voltage1 VPIN 2.9 VSHUNT V IN Supply Voltage1 VIN 2.9 VSHUNT V Shunt Regulation Voltage VSHUNT IIN = 3 mA, IPIN = 3 mA, TA = 25°C 5.4 5.6 5.7 V IIN = 3 mA, IPIN = 3 mA 5.2 5.6 6.0 V Shunt Resistance RSHUNT Current into IN = 8 mA to 12 mA 13 Ω Current into PIN = 8 mA to 12 mA 7 Ω IN Quiescent Current IIN VIN = 2.9 V to 5.5 V, VFB = 1.215 V 1.8 3 mA IN Shutdown Current VIN = 2.9 V to 5.5 V, SDSN = GND 1 10 μA PIN Supply Current IPIN Static Mode, No Switching VFB = 1.3 V, VCOMP < VCOMP,ZCT, GATE = 0 V 1 10 μA Shutdown Mode SDSN = GND 1 10 μA VUVLO VUVLO rising 2.2 2.5 2.8 V Undervoltage Lockout Threshold at IN Pin VUVLO hysteresis −80 mV FB Regulation Voltage VFB TA = 25°C 1.203 1.215 1.227 V 1.197 1.215 1.233 V FB Input Current IFB VFB = 1.215 V, TA = 25°C −75 +25 +75 nA Line Regulation2 ∆VFB/∆VIN 2.9 V ≤ VIN ≤ 5 V, TJ = −40°C to +85°C 0.02 0.06 %/V 2.9 V ≤ VIN ≤ 5 V, TJ = −40°C to +125°C 0.02 0.072 %/V Load Regulation3 ∆VFB/∆VCOMP VCOMP = 1.4 V to 1.5 V −1 −0.1 % Error Amplifier Transconductance gm 300 μS COMP Zero-Current Threshold VCOMP,ZCT 0.85 1.0 1.15 V COMP Clamp High Voltage VCOMP,CLAMP TJ = −40°C to +85°C 1.9 2.0 2.1 V TJ = −40°C to +125°C 1.9 2.0 2.2 V Current-Sense Amplifier Gain n 7.5 9.5 11.5 V/V Peak Slope-Compensation Current at CS Pin4 ISC,PK VCS = 0 V to 100 mV maximum across RS (GATE high) 55 70 85 μA CS Pin Leakage Current ICS,LEAK VCS = 30 V (GATE low) 5 μA Shutdown Time tSD SDSN pin from high to low or left floating 50 μs Thermal Shutdown Threshold5 TTMSD 150 °C Thermal Shutdown Hysteresis5 −10 °C OSCILLATOR Oscillator Frequency Range6 fOSC 100 1500 kHz Oscillator Frequency fOSC RFREQ = 65 kΩ, TA = 25°C 255 325 395 kHz Oscillator Frequency Tempco fOSC,TC ±0.06 %/°C SDSN Input Level Threshold VSDSN,THRESH VIN = VPIN = 5 V 1.5 1.7 1.9 V SDSN Threshold Hysteresis −0.19 V SDSN Internal Pull-Down Resistor RSDSN 100 kΩ Synchronization Minimum Pulse Width tSYNC,MIN VSDSN = 0 V to VIN 45 100 ns Synchronization Maximum Pulse Width tSYNC,MAX VSDSN = 0 V to VIN 0.8/fSYNC ns Synchronization Frequency fSYNC 110 1800 kHz GATE Minimum On Time tON,MIN VFB = 1.215 V, VCOMP = 1.0 V 180 215 ns GATE Minimum Off Time tOFF,MIN VFB = 1.215 V, VCOMP = 2.0 V 190 230 ns Maximum Duty Cycle6, 7 DMAX fSW = 200 kHz, RFREQ = 100 kΩ 93 97 % Recommended Maximum Synchronized Frequency Ratio6, 8 fSYNC/fOSC fOSC = 200 kHz, RFREQ = 100 kΩ, fSYNC = fSW 1.1 1.2 1.4 |
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