Nexperia

74LVC2G240

Dual inverting buffer/line driver; 3-state

Tamb = -40 °C to +85 °C

Tamb =

-40 °C to +125 °C

Symbol Parameter

Conditions

Min

Typ [1]

Max

Min

Max

Unit

per buffer; VI = GND to VCC

[5]

output enabled

-

18

-

-

-

pF

CPD

power dissipation

capacitance

output disabled

-

5

-

-

-

pF

[1] Typical values are measured at nominal VCC and at Tamb = 25 °C.

[2] tpd is the same as tPLH and tPHL

[3] ten is the same as tPZH and tPZL

[4] tdis is the same as tPLZ and tPHZ

[5] CPD is used to determine the dynamic power dissipation (PD in μW).

PD = CPD × VCC 2 × fi × N + Σ(CL × VCC 2 × fo) where:

fi = input frequency in MHz;

fo = output frequency in MHz;

CL = output load capacitance in pF;

VCC = supply voltage in V;

N = number of inputs switching;

Σ(CL × VCC 2 × fo) = sum of outputs.

11.1. Waveforms and test circuit

mna960

tPLH

tPHL

VM

VM

VM

VM

nY output

nA input

VI

GND

VOH

VOL

Measurement points are given in Table 9.

Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.

Fig. 3. The data input (nA) to output (nY) propagation delays

mna961

tPLZ

tPHZ

outputs

disabled

outputs

enabled

VY

VX

outputs

enabled

output

LOW-to-OFF

OFF-to-LOW

output

HIGH-to-OFF

OFF-to-HIGH

nOE input

VOL

VOH

VCC

VI

VM

GND

GND

tPZL

tPZH

VM

VM

Measurement points are given in Table 9.

Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.

Fig. 4. 3-state enable and disable times

74LVC2G240

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© Nexperia B.V. 2023. All rights reserved

Product data sheet

Rev. 12 — 1 June 2023

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