Nexperia

74LVC2G38

Dual 2-input NAND gate; open drain

11. Dynamic characteristics

Table 8. Dynamic characteristics

Voltages are referenced to GND (ground 0 V); for test circuit see Fig. 9.

-40 °C to +85 °C

-40 °C to +125 °C

Symbol Parameter

Conditions

Min

Typ [1]

Max

Min

Max

Unit

nA, nB to nY; see Fig. 8

VCC = 1.65 V to 1.95 V

1.2

3.0

8.6

1.2

10.8

ns

VCC = 2.3 V to 2.7 V

0.7

1.8

4.8

0.7

6.0

ns

VCC = 2.7 V

0.7

2.5

4.4

0.7

5.5

ns

VCC = 3.0 V to 3.6 V

0.7

2.1

4.1

0.7

5.2

ns

tPZL

OFF-state to LOW

propagation delay

VCC = 4.5 V to 5.5 V

0.5

1.5

3.3

0.5

4.2

ns

nA, nB to nY; see Fig. 8

VCC = 1.65 V to 1.95 V

1.2

3.0

8.6

1.2

10.8

ns

VCC = 2.3 V to 2.7 V

0.7

1.8

4.8

0.7

6.0

ns

VCC = 2.7 V

0.7

2.5

4.4

0.7

5.5

ns

VCC = 3.0 V to 3.6 V

0.7

2.1

4.1

0.7

5.2

ns

tPLZ

LOW to OFF-state

propagation delay

VCC = 4.5 V to 5.5 V

0.5

1.5

3.3

0.5

4.2

ns

CPD

power dissipation

capacitance

per gate; VI = GND to VCC [2]

-

5

-

-

-

pF

[1] Typical values are measured at nominal VCC and at Tamb = 25 °C.

[2] CPD is used to determine the dynamic power dissipation (PD in μW).

PD = CPD × VCC 2 × fi × N + ∑(CL × VCC 2 × fo) where:

fi = input frequency in MHz;

fo = output frequency in MHz;

CL = output load capacitance in pF;

VCC = supply voltage in V;

N = number of inputs switching;

∑(CL × VCC 2 × fo) = sum of outputs.

11.1. Waveforms and test circuit

mnb132

tPLZ

VX

nY output

nA, nB input

VI

VCC

VM

VOL

GND

tPZL

VM

Measurement points are given in Table 9

VOL is a typical output voltage level that occurs with the output load.

Fig. 8. Inputs nA and nB to output nY propagation delay times

74LVC2G38

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© Nexperia B.V. 2022. All rights reserved

Product data sheet

Rev. 14 — 21 June 2022

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