Nexperia

74LVC2GU04

Dual unbuffered inverter

4. Marking

Table 2. Marking codes

Type number

Marking [1]

74LVC2GU04GW

YD

74LVC2GU04GV

VU4

74LVC2GU04GM

YD

74LVC2GU04GN

YD

74LVC2GU04GS

YD

[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.

5. Functional diagram

1A

1Y

1

6

mnb106

2A

2Y

3

4

Fig. 1. Logic symbol

6

1

1

1

mnb107

4

3

Fig. 2. IEC logic symbol

mna636

A

Y

100 Ω

VCC VCC

Fig. 3. Logic diagram (one gate)

6. Pinning information

6.1. Pinning

74LVC2GU04

1A

1Y

GND

2A

2Y

001aab680

1

2

3

6

VCC

5

4

Fig. 4. Pin configuration

SOT363-2 (TSSOP6)

and SOT457 (SC-74; TSOP6)

74LVC2GU04

GND

001aab681

1A

2A

VCC

1Y

2Y

Transparent top view

2

3

1

5

4

6

Fig. 5. Pin configuration

SOT886 (XSON6)

74LVC2GU04

GND

001aag421

1A

2A

VCC

1Y

2Y

Transparent top view

2

3

1

5

4

6

Fig. 6. Pin configuration SOT1115

and SOT1202 (XSON6)

74LVC2GU04

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Product data sheet

Rev. 13 — 20 January 2022

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