NXP Semiconductors

PCA9306

Dual bidirectional I2C-bus and SMBus voltage-level translator

Type number

Orderable part number

Package

Packing method

Minimum

order

quantity

Temperature

*standard mark

PCA9306GM

PCA9306GM,125

XQFN8

Reel 7” Q3/T4

*standard mark

4000

Tamb = -40 °C to +105 °C

Table 2. Ordering options...continued

[1]

Discontinuation notice 202108009DN - move to PCA9306DC1Z.

[2]

This packing method uses a Static Shielding Bag (SSB) solution. Material should be kept in the sealed bag between uses.

4 Functional diagram

002aab844

SCL1

SDA1

VREF1

GND

3

4

VREF2

2

7

1

6

5

SCL2

SDA2

8

EN

SW

SW

PCA9306

Figure 1. Logic diagram of PCA9306 (positive logic)

5 Pinning information

5.1 Pinning

PCA9306DP1

GND

EN

VREF1

VREF2

SCL1

SCL2

SDA1

SDA2

002aab842

1

2

3

4

6

5

8

7

Figure 2. Pin configuration for TSSOP8 (DP1)

PCA9306DP

GND

EN

VREF1

VREF2

SCL1

SCL2

SDA1

SDA2

002aac373

1

2

3

4

6

5

8

7

Figure 3. Pin configuration for TSSOP8 (DP) (MSOP8)

PCA9306DC1

PCA9306DC1/DG

GND

EN

VREF1

VREF2

SCL1

SCL2

SDA1

SDA2

002aab843

1

2

3

4

6

5

8

7

Figure 4. Pin configuration for VSSOP8 (DC1; DC1/DG)

PCA9306D

GND

EN

VREF1

VREF2

SCL1

SCL2

SDA1

SDA2

002aac372

1

2

3

4

6

5

8

7

Figure 5. Pin configuration for SO8

PCA9306

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© 2023 NXP B.V. All rights reserved.

Product data sheet

Rev. 9.4 — 5 July 2023

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