Kawasaki LSI
• 2570 North First Street • Suite 301 • San Jose, CA 95131 • Tel: (408) 570-0555 • Fax: (408) 570-0567 • www.klsi.com
K
KCUSB3
USB Controller – Quick Interface
KAWASAKI
LSI
5
Ver. 1.3
Pin
Number
I/O
Pin Name
Description
Programmable
I/O Mode *
94
IN/OUT
XD_10
External Data Pins
95
IN/OUT
XD_11
External Data Pins
96
IN
IGND
GND
97
IN/OUT
XD_12
External Data Pins
98
IN/OUT
XD_13
External Data Pins
99
IN
OGND
GND
100
IN/OUT
XD_14
External Data Pins
* Dedicated GPIO’s are not selected.
Function Description
16 Bit Processor
The integrated 16 bit processor serves as a micro controller for USB peripherals. The processor
can execute approximately five million instructions per second. With this processing power it
allows the design of intelligent peripherals that can process data prior to passing it on to the host
PC, thus improving overall performance of the system.
The masked ROM (4K X 16) in the
KCUSB3 or external memory contains a specialized instruction set that has been designed for
highly efficient coding of processing algorithms and USB transaction processing.
The 16-bit processor is designed for efficient data execution by having direct access to the RAM
Buffer, external memory, I/O interfaces, and all the control and status registers.
The
divide/multiply feature expands the capability of USB peripherals.
The processor contains sixteen general-purpose registers along with several special purpose
registers including a flag register and an interrupt enable register. Eight of these registers can be
used for indirect Addressing, with optional indexed and auto increment modes available. One of
these general-purpose registers is additionally used as a stack pointer.
The register set is
mapped into RAM, and can be easily relocated for fast context switching.
The processor supports prioritized vectored hardware interrupts. In addition, as many as 240
software interrupt vectors are available.
The processor provides six addressing modes, supporting memory-to-memory, memory-to-
register, register-to-register, immediate-to-register or immediate-to-memory operations. Register,
direct, immediate, indirect, and indirect indexed addressing modes are supported. In addition,
there is an auto-increment mode in which a register, used as an address pointer is automatically
incremented after each use, making repetitive operations more efficient both from a programming
and a performance standpoint.
The processor features a full set of program control, logical, and integer arithmetic instructions.
All instructions are sixteen bits wide, although some instructions require operands, which may
occupy another one or two words. Several special “ short immediate” instructions are available,
so that certain frequently used operations with small constant operand will fit into a 16-bit
instruction.
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