CS3308 datasheet(39/44 Pages) CIRRUS

39 / 44 page

DS702F1

CS3308

as dictated by the ZCMode[1:0] and TimeOut[2:0] bits in the Device Config 2 register (see “Device

Configuration 2 - Address 0Ch” on page 34).

The value of the Master 3 volume control register is mapped to the desired 0.5 dB step Master 3 vol-

ume setting by the following equation:

In the equation above, “Desired Volume Setting in dB” is determined by rounding the desired ¼ dB

resolution volume setting down to ½ dB resolution.

It should be noted that input values outside the CS3308’s analog range of +22 dB to -96 dB are valid,

however, the volume of each channel will be limited to the CS3308’s analog range (see “Volume Lim-

its” on page 20).

See Table 5 on page 31 for example register settings.

7.17

Master 3 Control - Address 18h

7.17.1

Master 3 Mute (Bit 1)

Default = 0

Function:

This bit controls the Master 3 mute state. When set, the Master 3 mute condition is active. When

cleared, the Master 3 mute condition is released.

See “Muting Controls” on page 21 for more information about the muting behavior of the CS3308.

7.17.2

Master 3 ¼ dB Control (Bit 0)

Default = 0

Function:

When set, ¼ dB of gain will be added to the Master 3 volume level.

See Table 6 on page 32 for an example of volume settings using the ¼ dB control.

432

Reserved

M3_Mute

M3_Qtr

Desired Volume Setting in dB

() 210

CS3308 数据表(PDF) 39 Page - Cirrus Logic