MCP2155 datasheet(7/34 Pages) MICROCHIP

7 / 34 page

 2004 Microchip Technology Inc.

Preliminary

DS21894B-page 7

MCP2122

2.4

16XCLK (Bit Clock)

The MCP2122 requires an external clock source to

operate. The 16XCLK pin is the device clock input (see

Figure 2-5) and is independent of the host UART

interface or the IR interface. The 16XCLK determines

all timing during device operation. It is the edge of the

16XCLK pin that causes activity to occur.

The 16XCLK signal can also be referred to as a bit

clock (BITCLK). There are 16 BITCLKs for each bit

time. The BITCLKs are used for the generation of the

Start bit, the eight data bits and the Stop bit.

When the embedded system could be receiving IR

communication, the MCP2122 is required to have the

16XCLK signal clocking at the expected frequency,

with minimal variation in that frequency. Between data

bytes (Stop bit to Start bit), the 16XCLK frequency can

be changed. This may occur in systems where the Host

Controller is implementing one of the IrDA standard

application layer protocols (such as IrObex).

When the embedded system does not want to receive

IR communications, the 16XCLK clock can be disabled

(static). This will reduce the power consumption of the

system.

Figure 2-6 shows the relationship of the 16XCLK signal

to the RXIR input, which then determines the RX output

signal. Figure 2-7 shows the relationship of the

16XCLK signal to the TX input, which then determines

the TXIR output signal. For device timing information,

refer to Section 4.0 “Electrical Characteristics”.

FIGURE 2-5:

DEVICE CLOCK SOURCE

FIGURE 2-6:

16XCLK AND RX/RXIR

FIGURE 2-7:

16XCLK AND TX/TXIR

MCP2122

16XCLK

RXIR

16 16XCLK

≤ 3 CLK

16 16XCLK

Bit A

Bit B

(input)

(output)

(input)

3 CLK (

≤ ~ 4 µs)

16XCLK

TXIR

16 16XCLK

Bit A

Bit B

(input)

(output)

(input)

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