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STSMIA832 数据表(PDF) 4 Page - STMicroelectronics |
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STSMIA832 数据表(HTML) 4 Page - STMicroelectronics |
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4 / 23 page ![]() Pin configuration STSMIA832 4/23 2 Pin configuration Figure 3. Pin connections (top through view - bumps are on the other side) Table 1. Pin description PlN N° SYMBOL NAME AND FUNCTION D5 D1 Decoder output (LSB) E5 D2 Decoder output D4 D3 Decoder output D3 D4 Decoder output D2 D5 Decoder output D1 D6 Decoder output E1 D7 Decoder output C3 D8 Decoder output (MSB) A2, A1 D+, D- Differential data receiver inputs A5, A4 STRB+, STRB- Differential strobe receiver inputs (Class_Sel = VL) Differential clock receiver inputs (Class_Sel = GND) B3 EN Receivers enable input E3 CLK Clock output C2 H-SYNC Horizontal sync output B2 V-SYNC Vertical sync output E2, E4 GND Ground (Digital I/O reference) A3, B1 GND Ground (Analog subLVDS part) B5 VDD Core supply voltage C1, C5 VL Digital I/O supply voltage B4 SYNC_SEL Select sync input C4 CLASS_SEL Select CLASS input |
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