MA2909/11
4
Cycle
N
N + 1
N
N + 1
N
N + 1
N
N + 1
N
N + 1
N
N + 1
N
N + 1
N
N + 1
N
N + 1
N
N + 1
N
N + 1
N
N + 1
S1
S0
FE PUP
L
L
L
L
-
L
L
L
H
-
L
L
H
X
-
L
H
L
L
-
L
H
L
H
-
L
H
H
X
-
H
L
L
L
-
H
L
L
H
-
H
L
H
X
-
H
H
L
L
-
H
H
L
H
-
H
H
H
X
-
µPC
J
J + 1
J
J + 1
J
J + 1
J
K + 1
J
K + 1
J
K + 1
J
Ra + 1
J
Ra + 1
J
Ra + 1
J
D + 1
J
D + 1
J
D + 1
REG
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
STK0
Ra
Rb
Ra
J
Ra
Ra
Ra
Rb
Ra
J
Ra
Ra
Ra
Rb
Ra
J
Ra
Ra
Ra
Rb
Ra
J
Ra
Ra
STK1
Rb
Rc
Rb
Ra
Rb
Rb
Rb
Rc
Rb
Ra
Rb
Rb
Rb
Rc
Rb
Ra
Rb
Rb
Rb
Rc
Rb
Ra
Rb
Rb
STK2
Rc
Rd
Rc
Rb
Rc
Rc
Rc
Rd
Rc
Rb
Rc
Rc
Rc
Rd
Rc
Rb
Rc
Rc
Rc
Rd
Rc
Rb
Rc
Rc
STK3
Rd
Ra
Rd
Rc
Rd
Rd
Rd
Ra
Rd
Rc
Rd
Rd
Rd
Ra
Rd
Rc
Rd
Rd
Rd
Ra
Rd
Rc
Rd
Rd
Principal Use
End Loop
Set-up Loop
Continue
End Loop
JSR AR
JMP AR
RTS
Stack Ref
(Loop)
End Loop
JSR D
JMP D
1 = High, 0 = Low, X = Irrelevant, Assume Cn = High
Note: STK0 is the location addressed by the stack pointer
Table 2: Output and Internal Next-Cycle Register States for 2909/2911
Table 3 (Page 5) illustrates the execution of a subroutine
using the 2909. The configuration of Figure 2 is assumed. The
instruction being executed at any given time is the one
contained in the microword register (µWR). The contents of the
µWR also control (indirectly, perhaps) the four signals S0, S1,
FE, and PUP. The starting address of the subroutine is applied
to the D inputs of the 2909 at the appropriate time.
In the column on the left is the sequence of
microinstructions to be executed. At address J+2, the
sequence control portion of the microinstruction contains the
command “Jump to subroutine at A”.
At the time T2, this instruction is in the µWR, and the 2909
inputs are set-up to execute the jump and save the return
address. The subroutine address A is applied to the D inputs
from the µWR and appears on the Y outputs. The first
instruction of the subroutine, I(A), is accessed and is at the
inputs of the µWR. On the next clock transition, l(A) is loaded
into the µWR for execution, and the return address J + 3 is
pushed on to the stack. The return instruction is executed at
T5. Table 4 is a similar timing chart showing one subroutine
linking to a second, the latter consisting of only one
microinstruction.
YOUT
J
-
J
-
J
-
K
-
K
-
K
-
Ra
-
Ra
-
Ra
-
D
-
D
-
D
-
Comment
Pop Stack
Push µPC
Continue
Pop Stack;
Use AR for Address
Push µPC;
Jump to Address in AR
Jump to Address in AR
Jump to Address in
STK0; Pop Stack
Jump to Address in
STK0; Push µPC
Jump to Address in
STK0
Pop Stack;
Jump to Address on D
Jump to Address on D;
Push µPC
Jump to Address on D
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