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PI74ALVCH16721 数据表(PDF) 1 Page - Pericom Semiconductor Corporation

部件名 PI74ALVCH16721
功能描述  3.3V 20-Bit Flip-Flop with 3-STATE Outputs
PDF  5 Pages
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制造商  PERICOM [Pericom Semiconductor Corporation]
网页  http://www.pericom.com
标志 PERICOM - Pericom Semiconductor Corporation

PI74ALVCH16721 数据表(HTML) 1 Page - Pericom Semiconductor Corporation

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PS8090C 02/07/00
Product Description
Pericom Semiconductor’s PI74ALVCH series of logic circuits are
produced in the Company’s advanced 0.5 micron CMOS
technology, achieving industry leading speed.
The PI74ALVCH16721 is a 20-bit flip-flop with 3-state outputs
designed specifically for 2.3V to 3.6V VCC operation. The
PI74ALVCH16721 is designed with edge-triggered D-type flip-
flops with qualified clock storage. On the positive transition of
clock (CLK) input, the device provides true data at the Q outputs,
provided that the clock-enable (CLKEN) input is LOW. If CLKEN
is HIGH, no data is stored.
A buffered output-enable (OE) input can be used to place the
20 outputs in either a normal logic state (HIGH or LOW level) or
a high-impedance state. In the high-impedance state, the outputs
neitherloadnordrivethebuslinessignificantly.Thehigh-impedance
state and increased drive provide the capacity to drive bus lines
without the need for interface or pullup components. OE does not
affect the internal operation of the flip-flops. Old data can be
retained or new data can be entered while the outputs are in the
high-impedance state.
To ensure the high-impedance state during power up or power
down, OE should be tied to VCC through a pullup resistor; the
minimum value of the resistor is determined by the current-sinking
capability of the driver.
The PI74ALVCH16721 data has “Bus Hold” which retains the
data input’s last state whenever the data input goes to high-
impedance preventing “floating” inputs and eliminating the need
for pullup/down resistors.
Product Features
• PI74ALVCH16721 is designed for low voltage operation
• VCC = 2.3V to 3.6V
• Hysteresis on all inputs
• Typical VOLP (Output Ground Bounce)
< 0.8V at VCC = 3.3V, TA = 25°C
• Typical VOHV (Output VOH Undershoot)
< 2.0V at VCC = 3.3V, TA = 25°C
• Bus Hold retains last active bus state during 3-STATE,
eliminating the need for external pullup resistors
• Industrial operation at –40°C to +85°C
• Packages available:
– 56-pin 240 mil wide plastic TSSOP (A)
– 56-pin 300 mil wide plastic SSOP (V)
Logic Block Diagram
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29
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3.3V 20-Bit Flip-Flop
with 3-STATE Outputs
PI74ALVCH16721


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