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BLF369 数据表(PDF) 2 Page - NXP Semiconductors |
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BLF369 数据表(HTML) 2 Page - NXP Semiconductors |
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2 / 13 page ![]() BLF369_2 © NXP B.V. 2006. All rights reserved. Objective data sheet Rev. 02 — 8 December 2006 2 of 13 NXP Semiconductors BLF369 VHF power LDMOS transistor 2. Pinning information [1] Connected to flange. 3. Ordering information 4. Limiting values 5. Thermal characteristics [1] Tj is the junction temperature. [2] Rth(j-case) and Rth(j-h) are measured under RF conditions. [3] Rth(j-h) is dependent on the applied thermal compound and clamping/mounting of the device. Table 2. Pinning Pin Description Simplified outline Symbol 1 drain1 2 drain2 3 gate1 4 gate2 5 source [1] 5 12 4 3 4 3 5 1 2 sym117 Table 3. Ordering information Type number Package Name Description Version BLF369 - flanged LDMOST ceramic package; 2 mounting holes; 4 leads SOT800-2 Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VDS drain-source voltage - 65 V VGS gate-source voltage −0.5 +13 V Tstg storage temperature −65 +150 °C Tj junction temperature - 200 °C Table 5. Thermal characteristics Symbol Parameter Conditions Typ Unit Rth(j-case) thermal resistance from junction to case Tj = 200 °C [1][2] 0.26 K/W Rth(j-h) thermal resistance from junction to heatsink Tj = 200 °C [1][2][3] 0.35 K/W |
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