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UPC667CT 数据表(PDF) 9 Page - Renesas Technology Corp

部件名 UPC667CT
功能描述  BIPOLAR ANALOG INTEGRATED CIRCUIT
PDF  14 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

UPC667CT 数据表(HTML) 9 Page - Renesas Technology Corp

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µPC667
7
DC Characteristics and AC Characteristics (TA = –10 to +70 ˚C, DVCC = AVCC = +5
±0.25 V)
Parameter
Symbol
Conditions
MIN.
TYP.
MAX.
Unit
Resolution
RSL
10
Bit
Integral linearity error
ILE
TA = 0 to 60 ˚C, VREF = 4.0 V
–1.0
+1.0
LSB
Differential linearity error
DLE
TA = 0 to 60 ˚C, VREF = 4.0 V
–1.0
+1.0
LSB
Supply current
ICC
50
71
mA
Set-up time
ts
37
ns
Hold time
th
1.5
7
ns
Settling time
tSET
TA = 25 ˚C, RL = 375
Ω, VREF = 4.0 V
13
ns
Output delay time
td
VREF = 4.0 V
9
13
ns
Full-scale voltage output
Vofs
VREF = 4.0 V, RL > 100 k
4.95
5.0
V
Zero-scale voltage output
Vozs
VREF = 4.0 V, RL > 100 k
3.95
4
4.05
V
Output resistance
Zout
VREF = 4.0 V
70
85
100
Internal reference voltage output voltage
VROUT
AVCC = 5.0 V
3.8
4.0
4.2
V
Cautions 1.
As for the phase compensation capacitance, capacitor of 1
µF should be connected between
the phase compensation capacitance pin (COMP) and the power supply pin for analog circuit
(AVCC).
2.
The internal reference voltage output pin (VROUT) and the reference voltage input pin (VREF)
should be shorted.
3.
The power supply and GND lines for analog circuit (AVCC and AGND) and those for digital
circuit (DVCC and DGND) should be located as separately as possible.



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