RT9703CS datasheet(11/14 Pages) RICHTEK

11 / 14 page

RT9703

Preliminary

Applications Information

The RT9703 is a high-side, N-Channel, power switch

available with active-high enable input. Low RDS(ON)dd

80m

Ω and full protection functions make it optimized to

replace complex discrete on/off control circuitry.

Input and Output

VIN (input) is the power source connection to the internal

circuitry and the drain of the MOSFET. VOUT (output) is

the source of the MOSFET. In a typical application, current

flows through the switch from VIN to VOUT toward the load.

If VOUT is greater than VIN, current will flow from VOUT to

VIN since the MOSFET is bidirectional when on.

Unlike a normal MOSFET, there is no a parasitic body

diode between drain and source of the MOSFET, the

RT9703 prevents reverse current flow if VOUT being

externally forced to a higher voltage than VIN when the

output disabled (VCE < 0.8V).

Normal MOSFET

RT9704

Normal MOSFET

RT9704

Chip Enable Input

The switch will be disabled when the CE pin is in a logic

low condition. During this condition, the internal circuitry

and MOSFET are turned off, reducing the supply current

to 0.1

µA typically. The maximum guaranteed voltage for

a logic low at the CE pin is 0.8V. A minimum guaranteed

voltage of 2V at the CE pin will turn the RT9703 back on.

Floating the input may cause unpredictable operation. CE

should not be allowed to go negative with respect to GND.

The CE pin may be directly tied to VIN to keep the part on.

Soft-Start for Hot Plug-In Applications

In order to eliminate the upstream voltage droop caused

by the large inrush current during hot-plug events, the

“

soft-start” feature effectively isolates the power source

from extremely large capacitive loads.

Fault Flag

The RT9703 provides a FLG signal pin which is an

N-Channel open drain MOSFET output. This open drain

output goes low when VOUT < VIN -1V, current limit or the

die temperature exceeds 130°C approximately. The FLG

output is capable of sinking a 10mA load to typically

150mV above ground. The FLG pin requires a pull-up

resistor, this resistor should be large in value to reduce

energy drain. A 100k

Ω pull-up resistor works well for most

applications. In the case of an over-current condition, FLG

will be asserted only after the flag response delay time,

tD, has elapsed. This ensures that FLG is asserted only

upon valid over-current conditions and that erroneous

error reporting is eliminated.

For example, false over-current conditions may occur

during hot-plug events when a highly large capacitive load

is connected and causes a high transient inrush current

that exceeds the current limit threshold. The FLG

response delay time tD is typically 4.6ms.

Under-Voltage Lockout

Under-Voltage lockout (UVLO) prevents the MOSFET

switch from turning on until input voltage exceeds

approximately 1.7V. If input voltage drops below

approximately 1.3V, UVLO turns off the MOSFET switch,

FLG will be asserted accordingly. Under- Voltage detection

functions only when the chip enable input is enabled.

Current Limiting and Short-Circuit Protection

The current limit circuitry prevents damage to the

MOSFET switch and external load. It is user adjust- able

with an external set resistor, RSET, ILIMIT = 180k/RSET in

the range of 500mA to 3.5A. The accuracy of current limit

set point may vary with operating temperature and supply

voltage. See “Typical Operating Characteristics” graph

for further details.

≈

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