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74ALVT16601 数据表(PDF) 16 Page - Nexperia B.V. All rights reserved |
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74ALVT16601 数据表(HTML) 16 Page - Nexperia B.V. All rights reserved |
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16 / 21 page ![]() 74ALVT16601_3 © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Product data sheet Rev. 03 — 5 July 2005 15 of 20 Philips Semiconductors 74ALVT16601 18-bit universal bus transceiver; 3-state Table 9: Measurement points Supply voltage Input Output VM VM VX VY ≥ 3 V 1.5 V 1.5 V VOL + 0.3 V VOH − 0.3 V ≤ 2.7 V 0.5 × VCC 0.5 × V CC VOL + 0.15 V VOH − 0.15 V Measurement points are given in Table 9. a. Input pulse definition Test data is given in Table 10. Definitions test circuit: RL = Load resistor. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to output impedance Zo of the pulse generator. VEXT = Test voltage for switching times. b. Test circuit Fig 11. Load circuitry for switching times Table 10: Test data Input Load VEXT VI fi tW tr, tf CL RL tPLZ, tPZL tPLH, tPHL tPHZ,tPZH 3.0 V or VCC whichever is less ≤ 10 MHz 500 ns ≤ 2.5 ns 30 pF or 50 pF 500 Ω 6 V or 2 × V CC open GND 001aac221 VM VM tW tW 10 % 90 % 90 % 0 V VI VI negative pulse positive pulse 0 V VM VM 90 % 10 % 10 % tTHL(tf) tTLH(tr) tTLH(tr) tTHL(tf) VEXT VCC VI VO mna616 DUT CL RT RL RL PULSE GENERATOR |
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