Nexperia

74AHCT240

Octal buffer/line driver; inverting; 3-state

4. Functional diagram

mgu779

1A3

1A2

1A1

1A0

2

4

6

8

1

1Y0

1Y1

18

16

14

12

1Y2

1Y3

1OE

2A3

2A2

2A1

2A0

17

15

13

11

19

2Y0

2Y1

3

5

7

9

2Y2

2Y3

2OE

Fig. 1. Logic symbol

12

14

2

4

6

8

18

16

1

EN

mgu778

3

5

11

13

15

17

9

7

19

EN

Fig. 2. IEC logic symbol

5. Pinning information

5.1. Pinning

74AHCT240

1OE

VCC

1A0

2OE

2Y0

1Y0

1A1

2A0

2Y1

1Y1

1A2

2A1

2Y2

1Y2

1A3

2A2

2Y3

1Y3

GND

2A3

001aal192

1

2

3

4

5

6

7

8

9

10

12

11

14

13

16

15

18

17

20

19

Fig. 3. Pin configuration SOT163-1 (SO20) and

SOT360-1 (TSSOP20)

001aal193

74AHCT240

GND(1)

Transparent top view

1Y3

1A3

2Y3

2A2

2Y2

1Y2

1A2

2A1

2Y1

1Y1

1A1

2A0

2Y0

1Y0

1A0

2OE

9

12

8

13

7

14

6

15

5

16

4

17

3

18

2

19

terminal 1

index area

(1) This is not a ground pin. There is no electrical or

mechanical requirement to solder the pad. In case

soldered, the solder land should remain floating or

connected to GND.

Fig. 4. Pin configuration SOT764-1 (DHVQFN20)

74AHCT240

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© Nexperia B.V. 2020. All rights reserved

Product data sheet

Rev. 6 — 29 June 2020

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