Nexperia

74ALVC541

Octal buffer/line driver; 3-state

4. Functional diagram

2

3

4

5

6

7

8

9

18

17

16

15

14

13

12

11

1

19

A0

A1

A2

A3

A4

A5

A6

A7

Y0

Y1

Y2

Y3

Y4

Y5

Y6

Y7

OE0

OE1

mna179

Fig. 1. Logic symbol

mna180

9

11

12

13

14

15

16

2

3

4

5

6

7

8

18

17

19

1

&

EN

Fig. 2. IEC logic symbol

5. Pinning information

5.1. Pinning

74ALVC541

OE0

VCC

A0

OE1

A1

Y0

A2

Y1

A3

Y2

A4

Y3

A5

Y4

A6

Y5

A7

Y6

GND

Y7

001aah060

1

2

3

4

5

6

7

8

9

10

12

11

14

13

16

15

18

17

20

19

Fig. 3. Pin configuration SOT163-1 (SO20)

and SOT360-1 (TSSOP20)

001aah061

74ALVC541

Transparent top view

Y6

A6

A7

Y5

A5

Y4

GND(1)

A4

Y3

A3

Y2

A2

Y1

A1

Y0

A0

OE1

9

12

8

13

7

14

6

15

5

16

4

17

3

18

2

19

terminal 1

index area

(1) This is not a ground pin. There is no electrical or

mechanical requirement to solder the pad. In case

soldered, the solder land should remain floating or

connected to GND.

Fig. 4. Pin configuration SOT764-1 (DHVQFN20)

74ALVC541

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© Nexperia B.V. 2021. All rights reserved

Product data sheet

Rev. 5 — 30 April 2021

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