1/11

July 2001

s

HIGH SPEED:

s

LOW POWER DISSIPATION:

s

HIGH NOISE IMMUNITY:

s

SYMMETRICAL OUTPUT IMPEDANCE:

s

BALANCED PROPAGATION DELAYS:

s

WIDE OPERATING VOLTAGE RANGE:

s

PIN AND FUNCTION COMPATIBLE WITH

74 SERIES 237

DESCRIPTION

The M74HC237 is an high speed CMOS 3 TO 8

LINE DECODER fabricated with silicon gate

When GL goes from low to high, the address

present at the select inputs (A, B, C) is stored in

the latches. As long as GL remains high no

address changes will be recognized. Output

enable controls, G1 and G2 control the state of the

outputs

independently

of

the

select

or

latch-enable inputs. All of the outputs are low

unless G1 is high and G2 is low. The M74HC237

is

ideally

suited

for

the

implementation

of

glitch-free

decoders

in

stored-address

applications in bus oriented systems.

All inputs are equipped with protection circuits

against static discharge and transient excess

voltage.

M74HC237

3 TO 8 LINE DECODER LATCH

PIN CONNECTION AND IEC LOGIC SYMBOLS

ORDER CODES

PACKAGE

TUBE

T & R

DIP

M74HC237B1R

SOP

M74HC237M1R

M74HC237RM13TR

TSSOP

M74HC237TTR

TSSOP

DIP

SOP