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VV6410 数据表(PDF) 23 Page - STMicroelectronics |
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VV6410 数据表(HTML) 23 Page - STMicroelectronics |
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23 / 105 page ![]() CMOS Sensor; Customer Datasheet, Rev 3.0, 28 September 2000 VV5410 & VV6410 Commercial in confidence 23/105 cd5410-6410f-3-0.fm 6.4 Updating Exposure, Gain and Clock Division Settings Although the user can write a new exposure, gain or clock division parameter at any point within the field the sensor will only consume these new external values at a certain point. The exceptions to this behaviour are when the user has selected immediate update of gain and clock division. If the user has selected the former then the new gain or clock division value will be applied as soon as the serial interface message has completed. The fine and coarse exposure values are always written in a “timed” manner. There are a number of “update pending” flags available to the user (see Status0 reg[2] for details) that allows the user to detect when the sensor has consumed one of the timed parameters. In the next section of this document we will detail all the timed parameters and describe when they are updated. It is important to realise that there is a 1 frame latency between a new exposure value being applied to the sensor array and the results of this new exposure value being read-out. The same latency does not exist for the gain value. To ensure that the effect of the new exposure and gain values are coincident the sensor delays the application of the new gain value by approximately one frame relative to the application of the new exposure value. If the user is using the autoincrement option in the serial interface when writing a new series of exposure/gain and clock division parameters then it is important to ensure that the sensor receives the complete message bunch before updating any of the parameters. It is also important that the timed parameters are updated in the correct order, we will discuss this fully in the next section. If an autoincrement message sequence is in progress but we have reached the point in the field timing where the gain value would normally be updated, we actually inhibit the update. We inhibit the update to ensure that the gain change is not passed to the sensor while a change in the exposure is still pending. Video mode Register[37], bits[7:4] Effective system clock divisor CIF 4’b0001 Divide CLKI/CLKIP by 4 QCIF 4’b0011 Divide CLKI/CLKIP by 8 PAL/NTSC 4’b0000 Divide CLKI/CLKIP by 2 Table 8 : System Clock Divisor Options |
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