MP1925 – 100V, 4A, HIGH-FREQUENCY, HALF-BRIDGE GATE DRIVER

MP1925 Rev. 1.01

MonolithicPower.com

5

7/28/2020

MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.

© 2020 MPS. All Rights Reserved.

ELECTRICAL CHARACTERISTICS (continued)

VDD = VBST - VSW = 12V, VSS = VSW = 0V, no load at DRVH and DRVL, TJ = -40°C to +125°C, typical

value is tested at TJ = 25°C, unless otherwise noted.

Parameter

Symbol Condition

Min

Typ

Max

Units

Switching Specification – Low-Side Gate Driver

Turn-off propagation delay

INL falling to DRVL falling

tDLFF

20

ns

Turn-on propagation delay

INL rising to DRVL rising

tDLRR

20

DRVL rise time

CL = 2.2nF

15

ns

DRVL fall time

CL = 2.2nF

10

ns

Switching Specification – Floating Gate Driver

Turn-off propagation delay

INH falling to DRVH falling

tDHFF

20

ns

Turn-on propagation delay

INH rising to DRVH rising

tDHRR

20

ns

DRVH rise time

CL = 2.2nF

15

ns

DRVH fall time

CL = 2.2nF

10

ns

Switching Specification – Matching

Floating driver turn-off to low-side

driver turn-on (6)

tMON

1

5

ns

Low-side driver turn-off to floating

driver turn-on (6)

tMOFF

1

5

ns

Minimum input pulse width that

changes the output (6)

tPW

50

ns

Bootstrap diode turn-on or turn-

off time (6)

tBS

10

ns

Thermal shutdown

150

°C

Thermal shutdown hysteresis

25

°C

Note:

6) Guaranteed by design.

TIMING DIAGRAM

Figure 1: Timing Diagram