MP2192

– 2A, SYNCHRONOUS STEP-DOWN CONVERTER WITH 25µA IQ

MP2192 Rev. 1.0

MonolithicPower.com

13

5/12/2021

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© 2021 MPS. All Rights Reserved.

OPERATION

The MP2192 uses constant-on-time control

(COT)

with

input

voltage

feed-forward

to

stabilize the switching frequency across the

entire

input

voltage

range.

The

MP2192

achieves 2A of continuous output current from a

2.5V to 5.5V input voltage, with excellent load

and line regulation. The output voltage can be

regulated to as low as 0.6V.

Constant-On-Time (COT) Control

When compared to the fixed-frequency pulse-

width modulation (PWM) control, constant-on-

time (COT) control offers a simpler control loop

and a faster transient response. By using input

voltage feed-forward, the MP2192 maintains a

fairly constant switching frequency across the

input and output voltage ranges. The switching

pulse on time (tON) can be estimated with

Equation (1):

OUT

ON

IN

V

t

0.91 s

V







(1)

To prevent inductor current runaway during the

load

transient,

the

MP2192

has

a

fixed

minimum off time of 100ns.

Sleep Mode Operation

The MP2192 features sleep mode to achieve

high efficiency at extremely light loads. In sleep

mode, most of the circuit blocks are turned off

except for the error amplifier (EA) and PWM

comparator. This reduces the operation current

to a minimal value (see Figure 2).

Bias

and

Voltage

Reference

0.6V

FB

+

+

-

FBCOMP

Soft Start

E.A.

+

-

+

Ramp

Generator

SW

Low IQ

Low IQ

Figure 2: Operation Blocks in Sleep Mode

When the load becomes lighter, the output

voltage ripple becomes larger, which then

drives the error amplifier output (EAO) lower.

When the EAO reaches the internal low

threshold, it is clamped at that level, and the

MP2192 enters sleep mode.

During sleep mode, the valley of the FB voltage

(VFB) is regulated to the internal reference

voltage. Therefore, the average output voltage

in sleep mode exceeds the output voltage in

discontinuous

conduction

mode

(DCM)

or

continuous conduction mode (CCM). The on-

time pulse in sleep mode is longer than the on-

time pulse in DCM or CCM. Figure 3 shows the

relationship between the average VFB and the

internal reference voltage (VREF) in sleep mode.

VFB

VREF

Average VFB

Figure 3: FB Average Voltage in Sleep Mode

When the MP2192 is in sleep mode, the

average output voltage exceeds the internal

reference voltage. The EAO stays low and is

clamped

in

sleep

mode.

When

the

load

increases,

the

PWM

switching

period

decreases to regulate the output voltage ripple.

The output voltage ripple drops relative to the

PWM switching period. Once the EAO exceeds

the internal low threshold, the MP2192 exits

sleep mode and enters either DCM or CCM,

depending on the load. In DCM or CCM, the EA

regulates the average output voltage to VREF

(see Figure 4).

FB+ Ramp

EA Out

Average VFB =

VREF

Figure 4: DCM Control

Due to the EA’s clamping response time, there

is always a loading hysteresis when entering or

exiting sleep mode.

Advanced Asynchronous Modulation (AAM)

during Light-Load Operation

The MP2192 uses advanced asynchronous

modulation (AAM) power-save mode and a

zero-current detection (ZCD) circuit for light-

load operation.

The MP2192 uses AAM power-save mode for

light loads (see Figure 5). The AAM current

(IAAM) is set internally. The SW on-pulse time is

determined by the on-time generator and AAM

comparator.