MP5048

– 60V, 15A, 7mΩ RDS(ON) HOT-SWAP INTELLI-FUSE SOLUTION

MP5048 Rev. 1.1

www.MonolithicPower.com

21

4/30/2021

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APPLICATION INFORMATION

PCB Layout Guidelines

Efficient PCB layout is critical for optimal

performance.

A

4-layer

layout

is

strongly

recommended

to

achieve

better

thermal

performance. For the best results, refer to Figure

19 and follow the guidelines below:

1.

Place the MP5048

close to the board’s input

connector to minimize trace inductance.

2.

Place a small capacitor (CIN, 100nF) close to

the

MP5048’s VIN and GND pins to

minimize transients, which may occur on the

input supply line. Transients of several volts

can occur easily when the load current is

shut off.

3.

Place a 2.2µF capacitor as close to VCC as

possible.

4.

Keep the high-

current path from the board’s

input to load close to the return path, and in

parallel, to minimize loop inductance.

5.

An analog signal ground (AGND) plane is

used in the MP5048. Connect AGND to the

PCB power ground planes at a single point.

6.

If the MP5048 is paired with a hot-swap

controller, connect the reference ground of

all signal pins to the reference ground of the

controller.

VOUT

VOUT

VIN

17

16

11

12

9

10

8

7

23

22

25

24

26

27

6

18

21

13

28

VOUT

VIN

GND

TVS

CVCC

14

15

5

4

VIN

VIN

VOUT

1

2

3

29

30

20

19

AGND

Figure 19: Recommended PCB Layout (Placement and Top-Layer PCB)

VIN TVS: 5.0SMDJ51A

VOUT DIODE: B380-13-F