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L6730C 数据表(PDF) 28 Page - STMicroelectronics |
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L6730C 数据表(HTML) 28 Page - STMicroelectronics |
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28 / 50 page ![]() Device description L6730C - L6730D 28/50 5.14 Bootstrap anti-discharging system This built-in system avoids that the voltage across the bootstrap capacitor becomes less than 3.3V. An internal comparator senses the voltage across the external bootstrap capacitor keeping it charged, eventually turning-on the low-side MOSFET for approximately 200ns. If the bootstrap capacitor is not enough charged the high-side MOSFET cannot be effectively turned- on and it will present a higher RDS(on). In some cases the OCP can be also triggered. It’s possible to mention at least two application conditions during which the bootstrap capacitor can be discharged: 5.14.1 Fan’s power supply In many applications the FAN is a DC MOTOR driven by a voltage-mode DC/DC converter. Often only the speed of the MOTOR is controlled by varying the voltage applied to the input terminal and there’s no control on the torque because the current is not directly controlled. Obviously the current has to be limited in case of overload or short-circuit but without stopping the MOTOR. With the L6730D the current can be limited without shutting down the system because a constant-current-protection is provided. In order to vary the MOTOR speed the output voltage of the converter must be varied. Both L6730C and L6730D have a dedicated pin called EAREF (see the related section) that allows providing an external reference to the non- inverting input of the error-amplifier. In these applications the duty cycle depends on the MOTOR’s speed and sometimes 100% has to be set in order to go at the maximum speed. Unfortunately in these conditions the bootstrap capacitor can not be recharged and the system cannot work properly. Some PWM controller limits the maximum duty-cycle to 80-90% in order to keep the bootstrap cap charged but this make worse the performance during the load transient. Thanks to the “bootstrap anti- discharging system” the L6730X can work at 100% without any problem. The following picture shows the device behaviour when input voltage is 5V and 100% is set by the external reference. Figure 23. 100% duty cycle operation Vout=5V Vin=5V LGate Fsw?6.3KHz TOFF ≈ 200ns Vout=5V Vin=5V LGate Fsw?6.3KHz TOFF ≈ 200ns VOUT = 5V VIN = 5V LGate FSW ≈ 6.3KHz |
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