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M34C02-RMB1TG 数据表(PDF) 25 Page - STMicroelectronics |
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M34C02-RMB1TG 数据表(HTML) 25 Page - STMicroelectronics |
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25 / 31 page ![]() M34C02-W, M34C02-L, M34C02-R DC and AC parameters 25/31 Table 13. DC Characteristics (M34C02-R) Symbol Parameter Test Condition (in addition to those in Table 8) Min. Max. Unit ILI Input Leakage Current (SCL, SDA, E0, E1 and E2) VIN = VSS or VCC ± 2 µA ILO Output Leakage Current VOUT = VSS or VCC, SDA in Hi-Z ± 2 µA ICC Supply Current VCC =5V, fc=400kHz (rise/fall time < 30ns) 2mA VCC =2.5V, fc=400kHz (rise/fall time < 30ns) 1mA VCC =1.8V, fc=400kHz (rise/fall time < 30ns) 1mA ICC1 Stand-by Supply Current VIN = VSS or VCC , VCC = 5V 1 µA VIN = VSS or VCC , 1.8V ≤VCC < 2.5V 0.5 µA VIL Input Low Voltage(1) 1. The voltage source driving only E0, E1 and E2 inputs must provide an impedance of less than 1k Ω. 2.5V ≤V CC ≤5.5V – 0.3 0.3VCC V 1.8V ≤V CC < 2.5V – 0.3 0.25VCC V VIH Input High Voltage (1) 0.7VCC VCC+1 V VOL Output Low Voltage IOL = 3mA, VCC = 5V 0.4 V IOL = 2.1mA, 2.2V ≤VCC < 2.5V 0.4 V IOL = 0.15mA, VCC = 1.8V 0.2 V Table 14. AC Characteristics M34C02-W, M34C02-L, M34C02-R) Test conditions specified in Table 9 and Table 6 or Table 7 Symbol Alt. Parameter Min. Max. Unit fC fSCL Clock Frequency 400 kHz tCHCL tHIGH Clock Pulse Width High 600 ns tCLCH tLOW Clock Pulse Width Low 1300 ns tDL1DL2 (1) 1. Sampled only, not 100% tested. tF SDA Fall Time 20 300 ns tDXCX tSU:DAT Data In Set Up Time 100 ns tCLDX tHD:DAT Data In Hold Time 0 ns tCLQX tDH Data Out Hold Time 200 ns tCLQV (2) 2. To avoid spurious START and STOP conditions, a minimum delay is placed between SCL=1 and the falling or rising edge of SDA. tAA Clock Low to Next Data Valid (Access Time) 200 900 ns tCHDX (3) 3. For a reSTART condition, or following a Write cycle. tSU:STA Start Condition Set Up Time 600 ns tDLCL tHD:STA Start Condition Hold Time 600 ns tCHDH tSU:STO Stop Condition Set Up Time 600 ns tDHDL tBUF Time between Stop Condition and Next Start Condition 1300 ns tW tWR Write Time 10 ms |
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