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DVSS1

1

/VREG_EN

2

STEST

3

Test

4

Test

5

GPIO4

6

GPIO3

7

MCLKOUT

8

LRCLKOUT

9

SCLKOUT

10

SDOUT1

11

12

DVDD2

13

VR_DIG1

14

DVSS2

15

SPDIF_IN

16

Test

17

Test

18

Test

19

Test

20

SDIN3

21

SDIN2

22

SDIN1

23

LRCLKIN

24

SCLKIN

25

75

V1P5_REF

74

BG_REF

73

BIAS_REF

72

AVSS_ADC/REF

71

AVDD_ADC

70

LINEIN10R

69

LINEIN10L

68

AVSS_LI

67

LINEIN9R

66

LINEIN9L

65

AVDD_LI

64

LINEIN8R

63

LINEIN8L

62

AVSS_LI

61

LINEIN7R

60

LINEIN7L

59

AVDD_LI

58

LINEIN6R

57

LINEIN6L

56

AVSS_LI

55

LINEIN5R

54

LINEIN5L

53

AVDD_LI

52

LINEIN4R

51

LINEIN4L

DVSS1

1

/VREG_EN

2

STEST

3

4

5

GPIO4

6

GPIO3

7

MCLKOUT

8

LRCLKOUT

9

SCLKOUT

10

SDOUT1

11

12

DVDD2

13

VR_DIG1

14

DVSS2

15

SPDIF_IN

16

17

18

19

20

SDIN3

21

SDIN2

22

SDIN1

23

LRCLKIN

24

SCLKIN

25

75

V1P5_REF

74

BG_REF

73

BIAS_REF

72

AVSS_ADC/REF

71

AVDD_ADC

70

LINEIN10R

69

LINEIN10L

68

AVSS_LI

67

LINEIN9R

66

LINEIN9L

65

AVDD_LI

64

LINEIN8R

63

LINEIN8L

62

AVSS_LI

61

LINEIN7R

60

LINEIN7L

59

AVDD_LI

58

LINEIN6R

57

LINEIN6L

56

AVSS_LI

55

LINEIN5R

54

LINEIN5L

53

AVDD_LI

52

LINEIN4R

51

LINEIN4L

SDOUT 2/ SPDIFOUT

DESCRIPTION/ORDERING INFORMATION

TAS3208

DIGITAL AUDIO PROCESSOR WITH ANALOG INTERFACE

SLES201A – JANUARY 2007 – REVISED FEBRUARY 2007

TQFP PACKAGE

(TOP VIEW)

The TAS3208 is an audio SOC designed for digital TV Audio Systems and Mini/Micro Component applications.

TAS3208 has a programmable audio DSP that preserves high-quality audio by using a 48-bit data path, 28-bit

filter coefficients, and a single-cycle 28 times 48-bit multiplier. The programmability feature allows users to

customize features in the DSP RAM.

The TAS3208 is composed of seven functional blocks.

• Clock and Serial Data Interface

• Analog Input and Output

• 8051 WARP Controller, Serial Control Interface and Device Control

• Audio DSP – Digital Audio Processing

• Power Supply

• Internal References

ORDERING INFORMATION

ORDERABLE PART NUMBER

TOP-SIDE MARKING

–40

°C to 85°C

TQFP – YZP

TBD

TAS3208YZPR

TBD

(1)

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at

www.ti.com/sc/package.

2

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