8 (9)

DA9079.003

19 May, 2005

MAS9079 SAMPLES IN SBDIL 20 PACKAGE

NC 1

VDD 2

QO2 3

QO1 4

QO3 5

NC

6

QI 7

AGC 8

PDN2 9

OUT 10

20 VSS

19 RFI2

18 NC

17 RFI1

16 RFI3

15 NC

14 PDN1

13 AON

12 DEC

11 NC

Top Marking Definitions:

YYWW = Year Week

XXXXX.X = Lot Number

z =Sample Version Number

PIN DESCRIPTION

Pin Name

Pin

Type

Function

Note

NC

1

VDD

2

P

Positive Power Supply

QO2

3

AO

Quartz Filter Output for Crystal 2

QO1

4

AO

Quartz Filter Output for Crystal 1

QO3

5

AO

Quartz Filter Output for Crystal 3

NC

6

1

QI

7

AI

Quartz Filter Input for Crystal

AGC

8

AO

AGC Capacitor

PDN2

9

DI

Power Down/Frequency Selection Input 2

3

OUT

10

DO

Receiver Output

2

NC

11

DEC

12

AO

Demodulator Capacitor

AON

13

DI

AGC On Control

4

PDN1

14

DI

Power Down/Frequency Selection Input 1

3

NC

15

RFI3

16

AI

Receiver Input 3 (for Antenna Capacitor 3)

RFI1

17

AI

Receiver Input 1

NC

18

RFI2

19

AI

Receiver Input 2 (for Antenna Capacitor 2)

VSS

20

G

Power Supply Ground

A = Analog, D = Digital, P = Power, G = Ground, I = Input, O = Output, NC = Not Connected

Notes:

1) Pin 6 between QO3 and QI must be connected to VSS to eliminate DIL package leadframe parasitic

capacitances disturbing the crystal filter performance. All other NC (Not Connected) pins are also

recommended to be connected to VSS to minimize noise coupling.

2) OUT = VSS when carrier amplitude at maximum; OUT = VDD when carrier amplitude is reduced

(modulated)

-

-

at power down the output is pulled to VSS (pull down switch)

3) PDN1 = VDD and PDN2 = VDD means receiver off

-

Fast start-up is triggered when the receiver is after power down controlled to power up

4) AON = VSS means AGC off (hold current gain level); AON = VDD means AGC on (working)

-

Internal pull-up with current < 1

µA which is switched off at power down