2 (6)

DA1016.003

31 October, 2000

PAD LAYOUT

DIE size = 1.79 x 1.79 mm; PAD size = 100 x 100

µm

Substrate is connected to Vdd.

Note: Coordinates are calculated using Vdd as a centre point

Pad Identification

Name

X-coordinate

Y-coordinate

Note

Power Supply Voltage

VDD

0

µm

0

µm

Quarz Filter Output

QO

306

µm

19

µm

Quarz Filter Input

QI

587

µm

19

µm

AGC Capacitor

AGC

866

µm

19

µm

Receiver Output

OUT

1143

µm

19

µm

3

Demodulator Capacitor

DEC

1111

µm

1436

µm

AGC On Control

AON

868

µm

1436

µm

2

Power Down Input

PDN

551

µm

1436

µm

1

Receiver Input

RFI

309

µm

1436

µm

Power Supply Ground

VSS

16

µm

1415

µm

Notes:

1) Level = VSS means receiver on; VDD = receiver off

2) Level = VSS means AGC hold; VDD = AGC on (working)

-

Internal pull-up with current < 1

µA which is switched off in power down

-

During AGC hold the receiver output OUT is hold down to VSS

3) 100% AM results in Level = VSS; 25% AM results in Level = VDD

-

-

at power down the output is tri-state

MAS1016

VDD QO

QI AGC OUT

VSS RFI PDN AON DEC

1788 µm

1786 µm