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TCS3530 数据表(PDF) 88 Page - ams AG |
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TCS3530 数据表(HTML) 88 Page - ams AG |
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88 / 105 page  Page 88 Datasheet, Public Document Feedback [v3-00] 2023-Jun-23 TCS3530 − Register O ver view MOD_FIFO_DATA_CFG7 Register Figure 125: MOD_FIFO_DATA_CFG7 Note(s): 1. Return to the Register Map (0xFB). FIFO_STATUS0 Register Figure 126: FIFO_STATUS0 Note(s): 1. Return to the Register Map (0xFC, 0xFD). Addr: 0xFB MOD_FIFO_DATA_CFG7 Bit Field Default Access Bit Description 7 MOD_ALS_FIFO_ DATA7_WRITE_ ENABLE 1RAM=0x17L See MOD_ALS_FIFO_DATA0_WRITE_ENABLE. 5 MOD_FD_FIFO_ DATA7_ COMPRESSION_ ENABLE 0RAM=0x17L See MOD_FD_FIFO_DATA0_COMPRESSION_ ENABLE and MOD_FD_FIFO_DATA0_WIDTH for more details. 4 MOD_FD_FIFO_ DATA7_ DIFFERENCE_ ENABLE 0RAM=0x17L See MOD_FD_FIFO_DATA0_DIFFERENCE_ENABLE 3:0 MOD_FD_FIFO_ DATA7_WIDTH 15 RAM=0x17L See MOD_FD_FIFO_DATA0_WIDTH. Bits Addr Field Reset Type Description 7:0 0xFC FIFO_LVL[10:3] 0 R FIFO Status 0 Contains the number of 1-byte FIFO entries. The size of the FIFO is 1280x8 (5x128x16). Thus FIFO_LVL ranges between 0 (empty) and 1280 (full). Always read FIFO_STATUS0 and then FIFO_STATUS1 one after the other to receive correct FIFO status information. 2:0 0xFD FIFO_LVL[2:0] 0 R |
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