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CSTCS12.0MTA 数据表(PDF) 141 Page - STMicroelectronics |
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CSTCS12.0MTA 数据表(HTML) 141 Page - STMicroelectronics |
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141 / 153 page ![]() ST72334J/N, ST72314J/N, ST72124J 141/153 PACKAGE MECHANICAL DATA (Cont’d) Figure 102. 44-Pin Thin Quad Flat Package Figure 103. 42-Pin Plastic Dual In-Line Package, Shrink 600-mil Width Figure 104. THERMAL CHARACTERISTICS Notes: 1. The power dissipation is obtained from the formula PD=PINT+PPORT where PINT is the chip internal power (IDDxVDD) Dim. mm inches Min Typ Max Min Typ Max A 1.60 0.063 A1 0.05 0.15 0.002 0.006 A2 1.35 1.40 1.45 0.053 0.055 0.057 b 0.30 0.37 0.45 0.012 0.015 0.018 C 0.09 0.20 0.004 0.000 0.008 D 12.00 0.472 D1 10.00 0.394 E 12.00 0.472 E1 10.00 0.394 e 0.80 0.031 θ 0° 3.5° 7° 0° 3.5° 7° L 0.45 0.60 0.75 0.018 0.024 0.030 L1 1.00 0.039 Number of Pins N 44 A A2 A1 b e L1 L h c E E1 D D1 Dim. mm inches Min Typ Max Min Typ Max A 5.08 0.200 A1 0.51 0.020 A2 3.05 3.81 4.57 0.120 0.150 0.180 b 0.38 0.46 0.56 0.015 0.018 0.022 b2 0.89 1.02 1.14 0.035 0.040 0.045 c 0.23 0.25 0.38 0.009 0.010 0.015 D 36.58 36.83 37.08 1.440 1.450 1.460 E 15.24 16.00 0.600 0.630 E1 12.70 13.72 14.48 0.500 0.540 0.570 e 1.78 0.070 eA 15.24 0.600 eB 18.54 0.730 eC 1.52 0.000 0.060 L 2.54 3.30 3.56 0.100 0.130 0.140 Number of Pins N 42 E E1 eA eB E 0.015 GAGE PLANE eC eB D e b b2 A2 A1 c L A |
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