www.ti.com

FEATURES

3

2

4

6

1

B

GND

A

DBV PACKAGE

(TOP VIEW)

DCK PACKAGE

(TOP VIEW)

3

2

4

6

1

B

GND

A

3

2

4

6

1

B

GND

A

DRL PACKAGE

(TOP VIEW)

See mechanical drawings for dimensions.

DIR

DIR

DIR

5

5

5

YZP PACKAGE

(BOTTOM VIEW)

A

B

GND

1

4

2

3

6

5

DIR

C1

B1

A1

C2

B2

A2

DESCRIPTION/ORDERING INFORMATION

SN74LVC1T45

SINGLE-BIT DUAL-SUPPLY BUS TRANSCEIVER

WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS

SCES515H – DECEMBER 2003 – REVISED JANUARY 2007

• Available in the Texas Instruments

• Max Data Rates

NanoFree™ Package

–

420 Mbps (3.3-V to 5-V Translation)

• Fully Configurable Dual-Rail Design Allows

–

210 Mbps (Translate to 3.3 V)

Each Port to Operate Over the Full 1.65-V to

–

140 Mbps (Translate to 2.5 V)

5.5-V Power-Supply Range

–

75 Mbps (Translate to 1.8 V)

• V

• Latch-Up Performance Exceeds 100 mA Per

GND, Both Ports Are in the High-Impedance

JESD 78, Class II

State

• ESD Protection Exceeds JESD 22

• DIR Input Circuit Referenced to V

CCA

–

2000-V Human-Body Model (A114-A)

• Low Power Consumption, 4-µA Max I

CC

–

200-V Machine Model (A115-A)

• ±24-mA Output Drive at 3.3 V

–

1000-V Charged-Device Model (C101)

• I

Operation

This single-bit noninverting bus transceiver uses two separate configurable power-supply rails. The A port is

translation between any of the 1.8-V, 2.5-V, 3.3-V, and 5-V voltage nodes.

ORDERING INFORMATION

ORDERABLE PART NUMBER

NanoFree™ – WCSP (DSBGA)

Reel of 3000

SN74LVC1T45YZPR

_ _ _TA_

0.23-mm Large Bump – YZP (Pb-free)

Reel of 3000

SN74LVC1T45DBVR

SOT (SOT-23) – DBV

CT1_

Reel of 250

SN74LVC1T45DBVT

–40

°C to 85°C

Reel of 3000

SN74LVC1T45DCKR

SOT (SC-70) – DCK

Reel of 250

SN74LVC1T45DCKT

TA_

SOT (SOT-533) – DRL

Reel of 4000

SN74LVC1T45DRLR

(1)

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at

www.ti.com/sc/package.

(2)

DBV/DCK/DRL: The actual top-side marking has one additional character that designates the assembly/test site.

YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following

character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb,

• = Pb-free).

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

NanoFree is a trademark of Texas Instruments.

PRODUCTION DATA information is current as of publication date.

Copyright © 2003–2007, Texas Instruments Incorporated

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.