DSP56367P datasheet(5/100 Pages) FREESCALE

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DSP56367 Technical Data, Rev. 2.1

Freescale Semiconductor

2-1

Signal/Connection Descriptions

2.1

Signal Groupings

The input and output signals of the DSP56367 are organized into functional groups, which are listed in

Table 2-1 and illustrated in Figure 2-1.

The DSP56367 is operated from a 1.8V supply; however, some of the inputs can tolerate 3.3V. A special

notice for this feature is added to the signal descriptions of those inputs.

Remember, the DSP56367 offers 150 million instructions per second (MIPS) using an internal 150 MHz

clock at 1.8 V and 100 million instructions per second (MIPS) using an internal 100 MHz clock at 1.3.3V.

Table 2-1 DSP56367 Functional Signal Groupings

Functional Group

Number of

Signals

Detailed

Description

Power (VCC)20

Table 2-2

Ground (GND)

Table 2-3

Clock and PLL

Table 2-4

Address bus

Port A1

1 Port A is the external memory interface port, including the external address bus, data bus, and control signals.

Table 2-5

Data bus

Table 2-6

Bus control

Table 2-7

Interrupt and mode control

Table 2-8

HDI08

Port B2

2 Port B signals are the GPIO port signals which are multiplexed with the HDI08 signals.

Table 2-9

SHI

Table 2-10

ESAI

Port C3

3 Port C signals are the GPIO port signals which are multiplexed with the ESAI signals.

Table 2-11

ESAI_1

Port E4

4 Port E signals are the GPIO port signals which are multiplexed with the ESAI_1 signals.

Table 2-12

Digital audio transmitter (DAX)

Port D5

5 Port D signals are the GPIO port signals which are multiplexed with the DAX signals.

Table 2-13

Timer

Table 2-14

JTAG/OnCE Port

Table 2-15

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