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RT6318B 数据表(PDF) 13 Page - Richtek Technology Corporation |
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RT6318B 数据表(HTML) 13 Page - Richtek Technology Corporation |
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13 / 25 page ![]() RT6318B/C 13 DS6318B/C-01 December 2021 www.richtek.com © Copyright 2021 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. Application Information The RT6318B/C is high-performance 8A step-down regulators with internal power switches and synchronous rectifiers. They feature an Advanced Constant On-Time (ACOT®) control architecture that provides stable operation for ceramic output capacitors without complicated external compensation, among other benefits. The input voltage range is from 4.5V to 23V. The output voltage are fixed 3.3V (RT6318B) or 5.1V (RT6318C). The proprietary ACOT® control scheme improves conventional constant on-time architectures, achieving nearly constant switching frequency over line, load, and output voltage ranges. Since there is no internal clock, response to transients is nearly instantaneous and inductor current can ramp quickly to maintain output regulation without large bulk output capacitance. The RT6318B and the RT6318 include 3.3V and 5V linear regulator(LDO), respectively. The linear regulator provides an automatic saving power function, when VOUT rises above 3.1V (RT6318B) / 4.7V (RT6318C), an automatic circuit will change the power source of linear regulator from VIN path to VOUT path, therefore the power dissipation of linear regulator will be decrease efficiently. ACOT®Control Architecture The conventional CFCOT (constant frequency constant on-time) control which making the on-time proportional to VOUT and inversely proportional to VIN is not sufficient to achieve good constant-frequency behavior. Because voltage drops across the MOSFET switches and inductor cause sensing mismatch as sensing input and output voltage from LX pin. When the load change, the voltage drops across the MOSFET switches and inductor cause a switching frequency variation with load current. One way to reduce these effects is to measure the actual switching frequency and compare it to the desired range. This has the added benefit eliminating the need to sense the actual output voltage, potentially saving one pin connection. ACOT®uses this method, measuring the actual switching frequency and modifying the on-time with a feedback loop to keep the average switching frequency in the desired range. In order to achieve good stability with low-ESR ceramic capacitors, ACOT® uses a virtual inductor current ramp generated inside the IC. This internal ramp signal replaces the ESR ramp normally provided by the output capacitor’s ESR. The ramp signal and other internal compensations are optimized for low-ESR ceramic output capacitors. ACOT®One-Shot Operation The RT6318B/C control algorithm is simple to understand. The feedback voltage, with the virtual inductor current ramp added, is compared to the reference voltage. When the combined signal is less than the reference, the on-time one-shot is triggered as long as the minimum off-time one- shot is clear and the measured inductor current (through the synchronous rectifier) is below the current limit. The on-time one-shot turns on the high-side switch and the inductor current ramps up linearly. After the on-time, the high-side switch is turned off and the synchronous rectifier is turned on and the inductor current ramps down linearly. At the same time, the minimum off-time one-shot is triggered to prevent another immediate on-time during the noisy switching time and allow the feedback voltage and current sense signals to settle. The minimum off-time is kept short (200ns typical) so that rapidly-repeated on- times can raise the inductor current quickly when needed. Average Output Voltage Control Loop In continuous conduction mode, the RT6318B/C provides a average output voltage control loop to cancel the DC error between VFB(average) and VREF by adjusting the comparator input VREF to make VFB(average) always follow designed value. This loop can efficiently improves the load and line regulation without affecting the transient performance. The operation figure is shown in Figure 1. Figure 1. Average output voltage control loop operation DC error VFB(average) VREF |
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