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RT7208EB

Copyright © 2021 Richtek Technology Corporation. All rights reserved.

is a registered trademark of Richtek Technology Corporation.

DS7208EB-00

August

2021

www.richtek.com

21

Parameter

Symbol

Test Conditions

Min

Typ

Max

Unit

Register-Programmable

Delay Time after SYNC

Falling Edge for ZVS

Pulse

tD_ZVS

00

Disable

ns

01

90

130

170

10

150

215

280

11

210

300

390

Register-Programmable

Pulse ON Time for ZVS

tPULSE_ZVS

Interval limit from ZVS rising

edge to ZVS falling edge.

The

clock period is based on

fOSC_MCU and can be set by

the 6-bit register.

92

--

2346

ns

Note 1. Stresses beyond those listed under ”Absolute Maximum Ratings” may cause permanent damage to the device. These

are stress ratings only, and functional operation of the device at these or any other condition beyond those indicated in

the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may affect

device reliability.

Note 2.

JA is measured under natural convection (still air) at TA = 25°C with the component mounted on a high effective-thermal-

conductivity four-layer test board on a JEDEC 51-7 thermal measurement standard.

JC is measured at the exposed pad

of the package.

Note 3. Devices are ESD sensitive. Handling precaution is recommended.

Note 4. The device is not guaranteed to function outside its operating conditions.

Note 5. Guaranteed by design.

Note 6. For VG to GND, VG - V9 < 0.3V.

For VCP to GND, VCP- V5 < 0.3V.