HD74LS165A

Rev.3.00, Jul.15.2005, page 2 of 7

Function Table

Inputs

Parallel

Internal outputs

Shift / Load

Clock

Inhibit

Clock

Serial

A

…H

Output

L

X

X

X

a

…h

a

b

h

H

L

↑

X

X

H

L

↑

H

X

H

H

L

↑

L

X

L

H

H

X

X

X

Notes: 1. H; high level, L; low level, X; irrelevant

2.

↑; transition from low to high level

3.

a to h; the level of steady-state input at inputs A to H respectively

4.

established.

5.

↓ transition of the clock.

Block Diagram

Shift /

Load

Clock

Clock

Inhibit

Serial

Input

A

B

C

D

E

F

G

H

PR

S

R

CK

PR

S

R

CK

PR

S

R

CK

PR

S

R

CK

PR

S

R

CK

PR

S

R

CK

PR

S

R

CK

PR

Clear

Clear

Clear

Clear

Clear

Clear

Clear

Clear

S

R

CK

Absolute Maximum Ratings

Item

Symbol

Ratings

Unit

Supply voltage

7

V

Input voltage

7

V

Power dissipation

400

mW

Storage temperature

Tstg

–65 to +150

°C

Note:

Voltage value, unless otherwise noted, are with respect to network ground terminal.