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CS5166 数据表(PDF) 18 Page - ON Semiconductor |
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CS5166 数据表(HTML) 18 Page - ON Semiconductor |
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18 / 25 page ![]() CS5166 http://onsemi.com 18 deviation from the nominal output voltage is 25 mV smaller than it would be if there was no droop resistor. Similarly at full load the regulator output is pre−positioned at 18 mV below the nominal voltage before a load turn−off. The total voltage increase due to a load turn−off is ΔV−18 mV and the deviation from the nominal output voltage is 18 mV smaller than it would be if there was no droop resistor. This is because the output capacitors are pre−charged to value that is either 25 mV above the nominal output voltage before a load turn−on or, 18 mV below the nominal output voltage before a load turn−off (see Figure 16). Obviously, the larger the voltage drop across the droop resistor (the larger the resistance), the worse the DC and load regulation, but the better the AC transient response. + − Figure 30. Circuit Used to Determine the Voltage Across the Droop Resistor that will Trip the Internal Current Sense Comparator VIN L Q1 Q2 RDROOP VOUT COUT RISENSE RFB ISENSE IFB ISENSE VFB Current Limit Comparator VTH ISENSE CS5166 Current Limit Setpoint Calculations The following is the design equations used to set the current limit trip point by determining the value of the embedded PCB trace used as a current sensing element. The current limit setpoint has to be higher than the normal full load current. Attention has to be paid to the current rating of the external power components as these are the first to fail during an overload condition. The MOSFET continuous and pulsed drain current rating at a given case temperature has to be accounted for when setting the current limit trip point. For example the IRL 3103S (D2 PAK) MOSFET has a continuous drain current rating of 45 A at VGS = 10 V and TC = 100°C. Temperature curves on MOSFET manufacturers’ data sheets allow the designer to determine the MOSFET drain current at a particular VGS and TJ (junction temperature). This, in turn, will assist the designer to set a proper current limit, without causing device breakdown during an overload condition. For 300 MHz Pentium II CPU the full load is 14.2 A. The internal current sense comparator current limit voltage limits are: 55 mV < VTH < 130 mV. Also, there is a 29% total variation in RSENSE as discussed in the previous section. We select the value of the current sensing element (embedded PCB trace) for the minimum current limit setpoint: RSENSE(MAX) + VTH(MIN) ICL(MIN) å RSENSE 1.29 + 55 mV 14.2 A å RSENSE 1.29 + 3.87 mW å RSENSE + 3.0 mW We calculate the range of load currents that will cause the internal current sense comparator to detect and overload condition. From the overcurrent detection data section on page 3. Nominal Current Limit Setpoint VTH(TYP) + 76 mV ICL(NOM) + VTH(TYP) RSENSE(NOM) Maximum Current Limit Setpoint Therefore, ICL(NOM) + 76 mV 3.0 mW + 25.3 VTH(MAX) + 110 mV Therefore, ICL(MAX) + 110 mV RSENSE(MIN) + 110 mV RSENSE 0.71 + 110 mV 3.0 mW 0.71 + 51.6 A Therefore, the range of load currents that will cause the internal current sense comparator to detect an overload condition through a 3.0 mΩ embedded PCB trace is: 14.2 A < ICL < 51.6 A, with 25.3 A being the nominal overload condition. There may be applications whose layout will require the use of two extra filter components, a 510 Ω resistor in series with the ISENSE pin, and a 0.1 μF capacitor between the ISENSE and VFB pins. These are needed for proper current limit operation and the resistor value is layout dependent. |
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